 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
RT8167B Datasheet(PDF) 27 Page - Richtek Technology Corporation |
|
|
|||||||||||||||||||||||||||||
RT8167B Datasheet(HTML) 27 Page - Richtek Technology Corporation |
|
|
27 / 38 page  RT8167B 27 DS8167B-00 October 2011 www.richtek.com Data and Configuration Register Index Register Name Description Access Default 00h Vendor ID Vendor ID, default 1Eh. RO, Vendor 1Eh 01h Product ID Product ID. RO, Vendor 65h 02h Product Revision Product Revision. RO, Vendor 01h 05h Protocol ID SVID Protocol ID. RO, Vendor 01h 06h VR_Capability Bit mapped register, identifies the SVID VR capabilities and which of the optional telemetry register are supported. RO, Vendor 81h 10h Status_1 Data register containing the status of VR. R-M, W-PWM 00h 11h Status-2 Data register containing the status of transmission. R-M, W-PWM 00h 12h Temperature Zone Data register showing temperature zone that have been entered. R-M, W-PWM 00h 15h Output_Current Data register showing direct ADC conversion of averaged output current. R-M, W-PWM 00h 1Ch Status_2_lastread The register contains a copy of the status_2. R-M, W-PWM 00h 21h ICC_Max Data register containing the maximum ICC of platform supports. Binary format in Amp, IE 64h = 100A. RO, Platform -- 22h Temp_Max Data register containing the temperature max the platform supports. Binary format in °C, IE 64h = 100°C Only for CORE VR RO, Platform -- 24h SR-Fast Data register containing the capability of fast slew rate the platform can sustains. Binary format in mV/ μs, IE 0Ah = 10mV/ μs. RO 0Ah 25h SR-Slow Data register containing the capability of slow slew rate. Binary format in mV/ μs IE 02h = 2.5mV/μs. RO 02h 30h VOUT_Max The register is programmed by the master and sets the maximum VID. RW, Master BFh 31h VID Setting Data register containing currently programmed VID. RW, Master 00h 32h Power State Register containing the current programmed power state. RW, Master 00h 33h Offset Set offset in VID steps. RW, Master 00h 34h Multi VR Config Bit mapped data register which configures multiple VRs behavior on the same bus. RW, Master 00h 35h Pointer Scratch pad register for temporary storage of the SetRegADR pointer register. RW, Master 30h Notes : RO = Read Only RW = Read/Write R-M = Read by Master W-PWM = Write by PWM only Vendor = hard coded by VR vendor Platform = programmed by platform Master = programmed by the master PWM = programmed by the VR control IC |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
