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RT8167B Datasheet(PDF) 31 Page - Richtek Technology Corporation

Part # RT8167B
Description  Dual Single-Phase PWM Controller for CPU and GPU Core Power Supply
PDF  38 Pages
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT8167B Datasheet(HTML) 31 Page - Richtek Technology Corporation

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RT8167B
31
DS8167B-00
October 2011
www.richtek.com
Since the DCR of inductor is temperature dependent, it
affects the output accuracy in high temperature conditions.
Temperature compensation is recommended for the
lossless inductor DCR current sense method. Figure 10
shows a simple but effective way of compensating the
temperature variations of the sense resistor using an NTC
thermistor placed in the feedback path.
Figure 10. Loop Setting with Temperature Compensation
VCC_SENSE
-
+
VSS_SENSE
FBx
RGNDx
COMPx
C2
C1
R2
R1b
EA
R1a
NTC
VREFx
Figure 8. Simplified Schematic for Droop and Remote
Sense in CCM
Disable GFX VR : Before EN = High
GFX VR enable or disable is determined by the internal
circuitry that monitors the ISENAN voltage during start
up. Before EN = high, GFX VR detects whether the voltage
of ISENAN is higher than
“VCC − 1V” to disable GFX
VR. The unused driver pins can be connected to GND or
left floating.
GFX VR Forced-DEM Function Enable : After
VRA_Ready = High
The GFX VR's forced-DEM function can be enabled or
disabled with GFXPS2 pin. The RT8167B detects the
voltage of GFXPS2 for forced-DEM function. If the voltage
at GFXPS2 pin is higher than 4.3V, the GFX VR operates
in forced-DEM. If this voltage is lower than 0.7V, the GFX
VR follows SVID power state command.
Loop Control
Both CORE and GFX VR adopt Richtek's proprietary G-
NAVP
TM topology. G-NAVPTM is based on the finite-gain
valley current mode with CCRCOT (Constant Current
Ripple Constant On Time) topology. The output voltage,
VCORE or VGFX, will decrease with increasing output load
current. The control loop consists of PWM modulator with
power stage, current sense amplifier and error amplifier
as shown in Figure 8.
Similar to the valley current mode control with finite
compensator gain, the high side MOSFET on-time is
determined by the CCRCOT PWM generator. When load
current increases, VCS increases, the steady state COMP
voltage also increases which makes the output voltage
decrease, thus achieving AVP.
Droop Setting (with Temperature Compensation)
It's very easy to achieve the Active Voltage Positioning
(AVP) by properly setting the error amplifier gain due to
the native droop characteristics. The target is to have
VOUT = VREFx
− ILOAD x RDROOP
(1)
Then solving the switching condition VCOMPx = VCSx in
Figure 8 yields the desired error amplifier gain as
where AI is the internal current sense amplifier gain and
RSENSE is the current sense resistance. If no external sense
resistor is present, the DCR of the inductor will act as
RSENSE. RDROOP is the resistive slope value of the converter
output and is the desired static output impedance.
Figure 9. Error Amplifier Gain (AV) Influence on VOUT
Accuracy
AV1
AV2
AV2 > AV1
VOUT
Load Current
0
×
== I
SENSE
V
DROOP
AR
R2
A
R1
R
(2)
VIN
ISENxP
ISENxN
FBx
RGNDx
High Side
MOSFET
L
RX
CX
RC
C
R1
R2
CORE/GFX VR
VCC_SENSE
COMPx
VCSx
C2
C1
VREFx
GFX/CORE VR
CCRCOT
PWM Generator
Driver
Logic
Control
CByp
UGATEx
PHASEx
LGATEx
CORE/GFX VR
VSS_SENSE
VOUT
(VCORE/VGFX)
+
-
EA
+
-
Ai
CMP
Low Side
MOSFET



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