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RT8167B Datasheet(PDF) 35 Page - Richtek Technology Corporation |
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RT8167B Datasheet(HTML) 35 Page - Richtek Technology Corporation |
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35 / 38 page ![]() RT8167B 35 DS8167B-00 October 2011 www.richtek.com Figure 15. OCP Setting with Temperature Compensation OCSETx VCC ROC1b ROC2 ROC1a NTC Usually, ROC1a is selected to be equal to the thermistor's nominal resistance at room temperature. Ideally, VOCSET is assumed to have the same temperature coefficient as RSENSE (Inductor DCR) : OCSET, HOT SENSE, HOT OCSET, COLD SENSE, COLD VR VR = (19) (18) CC OC1 OC2 OCSET V RR 1 V ⎛⎞ =× − ⎜⎟ ⎝⎠ Figure 14. OCP Setting without Temperature Compensation VCC OCSETx ROC1 ROC2 The current limit is triggered when inductor current exceeds the current limit threshold ILIMIT, defined by VOCSET. The driver will be forced to turn off UGATE until the over current condition is cleared. If the over current condition remains valid for 15 PWM cycles, VR will trigger OCP latch. Latched OCP forces both UGATE and LGATE to go low. When OCP is triggered in one of VRs, the other VR will enter into soft shutdown sequence. The OCP latch mechanism will be masked when VRx_READY = low, which means that only the current limit will be active when VOUT is ramping up to initial voltage (or VREFx). If inductor DCR is used as the current sense component, then temperature compensation is recommended for protection under all conditions. Figure 15 shows a typical OCP setting with temperature compensation. Over Current Protection The CORE/GFX VR compares a programmable current limit set point to the voltage from the current sense amplifier output for Over Current Protection (OCP). The voltage applied to OCSETx pin defines the desired peak current limit threshold ILIMIT : VOCSET = 48 x ILIMIT x RSENSE (17) Connect a resistive voltage divider from VCC to GND, with the joint of the resistive divider connected to OCSET pin as shown in Figure 14. For a given ROC2, then The RT8167B supports two temperature reporting, VRHOT(hardware reporting) and ALERT(software reporting), to fulfill VR12/IMVP7 specification. VRHOT is an open-drain structure which sends out active-low VRHOT signals. When TSEN voltage rises above 1.855V (100% of VR temperature), the VRHOT signal will be set to low. When TSEN voltage drops below 1.8V (97% of VR temperature), the VRHOT signal will be reset to high. When TSEN voltage rises above 1.8V (97% of VR temperature), The RT8167B will update the bit1 data from 0 to 1 in the Status_1 register and assert ALERT. When TSEN voltage drops below 1.745V (94% of VR temperature), VR will update the bit1 data from 1 to 0 in the Status_1 register and assert ALERT. The temperature reporting function for the GFX VR can be disabled by pulling TSENA pin to VCC in case the temperature reporting function for the GFX VR is not used or the GFX VR is disabled. When the GFX VR's temperature reporting function is disabled, the RT8167B will reject the SVID command of getting the Temperature_Zone register content of the GFX VR. However, note that the temperature reporting function for the CORE VR is always active. CORE VR's temperature reporting function can not be disabled by pulling TSEN pin to VCC. |
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