AD1847

REV. B

–13–

Left Input Control Register (Index Address 0)

IA3:0

Data 7

Data 6

Data 5

Data 4

Data 3

Data 2

Data 1

Data 0

0000

LSS1

LSS0

res

res

LIG3

LIG2

LIG1

LIG0

LIG3:0

Left Input Gain Select. The least significant bit of this 16-level gain select represents +1.5 dB. Maximum gain is

+22.5 dB.

res

Reserved for future expansion. Write zeros (LO) to all reserved bits.

LSS1:0

Left Input Source Select. These bits select the input source for the left gain stage preceding the left ADC.

0

Left Line 1 Source Selected

1

Left Auxiliary 1 Source Selected

2

Left Line 2 Source Selected

3

Left Line 1 Post-Mixed Output Loopback Source Selected

This register’s initial state after reset is: 0000 0000 (00h).

Right Input Control Register (Index Address 1)

IA3:0

Data 7

Data 6

Data 5

Data 4

Data 3

Data 2

Data 1

Data 0

0001

RSS1

RSS0

res

res

RIG3

RIG2

RIG1

RIG0

RIG3:0

Right Input Gain Select. The least significant bit of this 16-level gain select represents +1.5 dB. Maximum gain is

+22.5 dB.

res

Reserved for future expansion. Write zeros (LO) to all reserved bits.

RSS1:0

Right Input Source Select. These bits select the input source for the right gain stage preceding the right ADC.

0

Right Line 1 Source Selected

1

Right Auxiliary 1 Source Selected

2

Right Line 2 Source Selected

3

Right Line 1 Post-Mixed Output Loopback Source Selected

This register’s initial state after reset is: 0000 0000 (00h).

Left Auxiliary #1 Input Control Register (Index Address 2)

IA3:0

Data 7

Data 6

Data 5

Data 4

Data 3

Data 2

Data 1

Data 0

0010

LMX1

res

res

LX1G4

LX1G3

LX1G2

LX1G1

LX1G0

LX1G4:0 Left Auxiliary Input #1 Gain Select. The least significant bit of this 32-level gain/attenuate select represents –1.5 dB.

LX1G4:0 = 0 produces a +12 dB gain. LX1G4:0 = “01000” (8 decimal) produces 0 dB gain. Maximum attenuation is

–34.5 dB. Gains referred to 2.0 V p-p full-scale output level.

res

Reserved for future expansion. Write zeros (LO) to all reserved bits.

LMX1

Left Auxiliary #1 Mute. This bit, when set HI, will mute the left channel of the Auxiliary #1 input source. This bit is set

HI after reset.

This register’s initial state after reset is: 1000 0000 (80h).

Right Auxiliary #1 Input Control Register (Index Address 3)

IA3:0

Data 7

Data 6

Data 5

Data 4

Data 3

Data 2

Data 1

Data 0

0011

RMX1

res

res

RX1G4

RX1G3

RX1G2

RX1G1

RX1G0

RX1G4:0 Right Auxiliary Input #1 Gain Select. The least significant bit of this 32-level gain/attenuate select represents –1.5 dB.

RX1G4:0 = 0 produces a +12 dB gain. RX1G4:0 = “01000” (8 decimal) produces 0 dB gain. Maximum attenuation is

–34.5 dB. Gains referred to 2.0 V p-p full-scale output level.

res

Reserved for future expansion. Write zeros (LO) to all reserved bits.

RMX1

Right Auxiliary #1 Mute. This bit, when set to HI, will mute the right channel of the Auxiliary #1 input source. This bit is

set to HI after reset.

This register’s initial state after reset is: 1000 0000 (80h).