SPRUG18 datasheet(169/214 Pages) TI

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TMS320C6474

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SPRS552H

– OCTOBER 2008 – REVISED APRIL 2011

7.16.2 VCP2 Peripheral Register Description(s)

Table 7-77. VCP2 Registers

EDMA BUS HEX ADDRESS RANGE

CONFIGURATION BUS HEX

ACRONYM

ADDRESS RANGE

5800 0000

VCPIC0

VCP2 input configuration Register 0

5800 0004

VCPIC1

VCP2 input configuration Register 1

5800 0008

VCPIC2

VCP2 input configuration Register 2

5800 000C

VCPIC3

VCP2 input configuration Register 3

5800 0010

VCPIC4

VCP2 input configuration Register 4

5800 0014

VCPIC5

VCP2 Input Configuration Register 5

5800 0018 - 5800 0044

Reserved

5800 0048

VCPOUT0

VCP2 output Register 0

5800 004C

VCPOUT1

VCP2 output Register 1

5800 0050 - 5800 007C

Reserved

5800 0080

N/A

VCPWBM

VCP2 branch metrics write FIFO

5800 0084 - 5800 009C

Reserved

5800 00C0

N/A

VCPRDECS

VCP2 decisions read FIFO Register

N/A

02B8 0018

VCPEXE

VCP2 execution Register

N/A

02B8 0020

VCPEND

VCP2 Endian mode Register

N/A

02B8 0040

VCPSTAT0

VCP2 Status Register 0

N/A

02B8 0044

VCPSTAT1

VCP2 Status Register 1

N/A

02B8 0050

VCPERR

VCP2 error Register

Reserved

N/A

02B8 0060

VCPEMU

VCP2 emulation control Register

N/A

02B8 0064 - 02B9 FFFF

Reserved

5800 1000

Branch metrics

5800 2000

State metric

5800 3000

TBHD

Traceback hard decision

5800 6000

TBSD

Traceback soft decision

5800 F000

Decoded bits

Peripheral Information and Electrical Specifications

169

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