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AM3359 Datasheet(PDF) 193 Page - Texas Instruments |
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AM3359 Datasheet(HTML) 193 Page - Texas Instruments |
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193 / 236 page ![]() LCD_AC_BIAS_EN (E0) W_SU (0 to 31) W_STROBE (1 to 63) W_HOLD (1 to 15) CS_DELAY (0 to 3) LCD_MEMORY_CLK 4 Write Instruction 5 10 6 LCD_D [7:0] ATA LCD_VSYNC (RS) LCD_HSYNC (R/ ) W LCD_MEMORY_CLK (E1) 6 7 10 11 6 6 7 8 8 9 AM3359, AM3358, AM3357 AM3356, AM3354, AM3352 www.ti.com SPRS717F – OCTOBER 2011 – REVISED APRIL 2013 Table 5-75. Switching Characteristics for LCD LIDD Mode (continued) (see Figure 5-72 through Figure 5-80) OPP100 NO. PARAMETER UNIT MIN MAX 11 tt(LCD_HSYNC) Transition time, LCD_HYSNC 1 10 ns 12 td(LCD_MEMORY_CLK-LCD_PCLK) Delay time, LCD_MEMORY_CLK high to LCD_PCLK 0 7 ns 13 tt(LCD_PCLK) Transition time, LCD_PCLK 1 10 ns Delay time, LCD_MEMORY_CLK high to 14 td(LCD_MEMORY_CLK-LCD_DATAZ) 0 7 ns LCD_DATA[15:0] high-Z Delay time, LCD_MEMORY_CLK high to 15 td(LCD_MEMORY_CLK-LCD_DATA) 0 7 ns LCD_DATA[15:0] driven 19 tt(LCD_MEMORY_CLK) Transition time, LCD_MEMORY_CLK 1 2.5 ns 20 tt(LCD_DATA) Transition time, LCD_DATA 1 10 ns A. Hitachi mode performs asynchronous operations that do not require an external LCD_MEMORY_CLK. The first LCD_MEMORY_CLK waveform is only shown as a reference of the internal clock that sequences the other signals. The second LCD_MEMORY_CLK waveform is shown as E1 since the LCD_MEMORY_CLK signal is used to implement the E1 function in Hitachi mode. Figure 5-71. Command Write in Hitachi Mode Copyright © 2011–2013, Texas Instruments Incorporated Peripheral Information and Timings 193 Submit Documentation Feedback Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 |
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