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DAC5682 Datasheet(PDF) 35 Page - Texas Instruments

Part # DAC5682
Description  Wideband Transmit-Receive Digital Signal Processors
PDF  49 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DAC5682 Datasheet(HTML) 35 Page - Texas Instruments

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DAC Data Clock
Min
Skew
Min
Skew
Max
Skew
Max
Skew
DAC Data, DAC Frame
T0510-01
Ideal Data Placement
GC5330
GC5337
www.ti.com
SLWS226 B
– DECEMBER 2010 – REVISED JANUARY 2011
Table 15. TX DAC Clock Centered Over Data Switching Characteristics (See Table 5 for Connections)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
DDR LVDS
fCLK(DAC)
DAC output clock frequency
See(1)
620
MHz
MIN
MAX
CLOCK
DATA
TEST CONDITIONS
UNIT
SKEW
SKEW
TXA4
TXA9:5, 3:0
See (2)(3)
–190
139
ps
TXA14
TXA19:15, 13:10
See (2)(3)
–241
205
ps
TXA9
TXA19:10, 8:0
See (2)(3)
–200
155
ps
TXB4
TXB9:5, 3:0
See (2)(3)
–169
238
ps
TXB14
TXB19:15, 13:10
See (2)(3)
–198
146
ps
TXB9
TXB19:10, 8:0
See (2)(3)
–145
235
ps
(1)
Chip specifications are production tested at 90
°C case temperature for the given specification. Early production lots are sample tested
at
–40°C.
(2)
Skew measured from DAC DATA desired P/N crossing to DATA P/N crossing. A negative skew is when the data arrives prior to the
clock.
(3)
tsu = 1/4 DAC clock period – Max. Skew, th = 1/4 DAC clock period + Min. Skew
Table 16. TX DAC Clock Aligned With Data Switching Characteristics (See Table 5 for Connections)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
DDR LVDS
fCLK(DAC)
DAC output clock frequency
See (1)
620
MHz
MIN
MAX
CLOCK
DATA
TEST CONDITIONS
UNIT
SKEW
SKEW
TXA4
TXA9:5, 3:0
See (2)
–190
139
ps
TXA14
TXA19:15, 13:10
See (2)
–241
205
ps
TXA9
TXA19:10, 8:0
See (2)
–200
155
ps
TXB4
TXB9:5, 3:0
See (2)
–169
238
ps
TXB14
TXB19:15, 13:10
See (2)
–198
146
ps
TXB9
TXB19:10, 8:0
See (2)
–145
235
ps
(1)
Chip specifications are production tested at 90
°C case temperature for the given specification. Early production lots are sample tested
at
–40°C.
(2)
Skew measured from DAC DATA desired P/N crossing to DATA P/N crossing. A negative skew is when the data arrives prior to the
clock.
Figure 18. TX LVDS Timing Specifications (TXA and TXB) (DACCLK Centered Over Data)
© 2010–2011, Texas Instruments Incorporated
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Product Folder Link(s): GC5330 GC5337



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