DAC5682 datasheet(30/49 Pages) TI

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GC5330

GC5337

SLWS226 B

– DECEMBER 2010 – REVISED JANUARY 2011

www.ti.com

Programmable trigger actions for alarm1:

(0) No action

(1) Reduce gain of DPD output by programmable scale factor (programmed with

stream[n].gain_reduce), only if alarm caused by y(k)

> high_threshold and alm_polarit = 0 or 2.

The gain reduction is applied at the CFR input. A control signal from the capture buffer block is

used to select the programmed gain value for the multiplier at the CFR input. When the host

resets this alarm by writing to the appropriate register, the control signal returns to 0 (state that is

not selecting the programmed gain value).

GENERAL SPECIFICATIONS

General Electrical Characteristics

This section describes the electrical characteristics for the CMOS interfaces (DVGA, MPU, JTAG, SPI,

TESTMOD, RESETB and INTERRPT) and LVDS interfaces (BBIN, BBOUT, TXA, TXB, RXA, RXB, RXC, SYNC,

DPDCLK) over recommended operating conditions (unless otherwise noted).

Table 9. General Electrical Characteristics, CMOS Interface

PARAMETER

TEST CONDITIONS

MIN NOM

MAX

UNIT

VIL

Voltage input low

See (1)

0.8

VIH

Voltage input high

See (1)

VDDSHV

VOL

Voltage output low

IOL = 2 mA

(1)

0.5

VOH

Voltage output high

IOH = –2 mA)

(1)

2.4

VDDSHV

|IPU|

Pullup current

VIN = 0 V

(1)

100

250

µA

|IPD|

Pulldown current

VIN = VDDSHV

(1)

100

250

µA

|IIN|

Leakage current

VIN = 0 or VDDSHV

(1) (2)

µA

(1)

Chip specifications are production tested at 90

°C case temperature for the given specification. Early production lots are sample tested

–40°C.

(2)

For inputs with no pullup or pulldown, inputs with pullup and VIN = VDDSHV, inputs with pulldown and VIN = 0, and bidirectionals in input

mode in either state.

Table 10. General Electrical Characteristics, LVDS Interfaces

PARAMETER

TEST CONDITIONS

MIN

NOM

MAX

UNIT

VICM

Input common mode voltage (VP – VN)/2

See (1)

700

1500

|VP – VN|

Input differential voltage

See (1)

150

700

RIN

Input differential impedance

See (1)

120

Ω

VCOM

Output common-mode voltage

See (2)

1125

1200

1275

VOD

Ouput differential voltage

See (1)

250

500

(1)

Chip specifications are production tested at 90

°C case temperature for the given specification. Early production lots are sample tested

–40°C.

(2)

Characteristics are determined by design.

General Switching Characteristics

The baseband interface TX has a single DDR interface input mode. The customer logic and trace routing must

meet the listed tsu and th input timing.

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