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ST72F262G2B5 Datasheet(PDF) 9 Page - STMicroelectronics |
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ST72F262G2B5 Datasheet(HTML) 9 Page - STMicroelectronics |
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9 / 172 page  ST72260Gx, ST72262Gx, ST72264Gx 9/172 Notes: 1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up column (wpu) is merged with the interrupt column (int), then the I/O configuration is a pull-up interrupt in- put, otherwise the configuration is a floating interrupt input. Port C is mapped to ei0 or ei1 by option byte. 2. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to VDD are not implemented). See Section 9 "I/O PORTS" on page 38 for more details. 3. OSC1 and OSC2 pins connect a crystal or ceramic resonator, or an external source to the on-chip os- cillator see Section 2 "PIN DESCRIPTION" on page 6 and Section 6.2 "MULTI-OSCILLATOR (MO)" on page 21 for more details. 4: For details refer to Section 13.8 on page 144 15 13 E2 PC4/OCMP2_B/AIN4 I/O CT X ei0/ei1 X X X Port C4 Timer B Output Compare 2 or ADC Analog Input 4 16 14 F3 PC3/ ICAP2_B/AIN3 I/O CT X ei0/ei1 X X X Port C3 Timer B Input Capture 2 or ADC Analog Input 3 17 15 E3 PC2/MCO/AIN2 I/O CT X ei0/ei1 X X X Port C2 Main clock output (fCPU) or ADC Analog Input 2 18 16 F4 PC1/OCMP1_B/AIN1 I/O CT X ei0/ei1 X X X Port C1 Timer B Output Compare 1 or ADC Analog Input 1 19 17 D3 PC0/ICAP1_B/AIN0 I/O CT X ei0/ei1 X X X Port C0 Timer B Input Capture 1 or ADC Analog Input 0 20 18 E4 PA7/TDO I/O CT HS X ei0 X X Port A7 SCI output 21 19 F5 PA6/SDAI I/O CT HS X ei0 T Port A6 I2C DATA 22 20 F6 PA5 /RDI I/O CT HS X ei0 X X Port A5 SCI input 23 21 E6 PA4/SCLI I/O CT HS X ei0 T Port A4 I2C CLOCK 24 E5 NC Not Connected 25 D6 NC D5 NC 26 22 C6 PA3 I/O CT HS X ei0 X X Port A3 27 23 D4 PA2 I/O CT HS X ei0 X X Port A2 C5 NC Not Connected B6 NC 28 24 A6 PA1/ICCDATA I/O CT HS X ei0 X X Port A1 In Circuit Communication Data 29 25 A5 PA0/ICCCLK I/O CT HS X ei0 X X Port A0 In Circuit Communication Clock 30 26 B5 ICCSEL I CT X ICC mode pin, must be tied low 31 27 A4 VSS S Ground 32 28 B4 VDD S Main power supply Pin n° Pin Name Level Port / Control Main Function (after reset) Alternate Function Input Output |
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