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AT90USB646 Datasheet(PDF) 293 Page - ATMEL Corporation |
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AT90USB646 Datasheet(HTML) 293 Page - ATMEL Corporation |
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293 / 456 page  293 7593L–AVR–09/12 AT90USB64/128 • 7 - Reserved The value read from these bits is always 0. Do not set these bits. • 6 - HWUPI - Host Wake-Up Interrupt Set by hardware when a non-idle state is detected on the USB bus.This interrupt should be enable only to wake up the CPU core from power down mode. Shall be clear by software to acknowledge the interrupt. Setting by software has no effect. • 5 - HSOFI - Host Start Of Frame Interrupt Set by hardware when a SOF is issued by the Host controller. This triggers a USB interrupt when HSOFE is set. When using the host controller in low speed mode, this bit is also set when a keep-alive is sent. Shall be cleared by software to acknowledge the interrupt. Setting by software has no effect. • 4 - RXRSMI - Upstream Resume Received Interrupt Set by hardware when an Upstream Resume has been received from the Device. Shall be cleared by software. Setting by software has no effect. • 3 - RSMEDI - Downstream Resume Sent Interrupt Set by hardware when a Downstream Resume has been sent to the Device. Shall be cleared by software. Setting by software has no effect. • 2 - RSTI - USB Reset Sent Interrupt Set by hardware when a USB Reset has been sent to the Device. Shall be cleared by software. Setting by software has no effect. • 1 - DDISCI - Device Disconnection Interrupt Set by hardware when the device has been removed from the USB bus. Shall be cleared by software. Setting by software has no effect. • 0 - DCONNI - Device Connection Interrupt Set by hardware when a new device has been connected to the USB bus. Shall be cleared by software. Setting by software has no effect. • 7 - Reserved The value read from these bits is always 0. Do not set these bits. Bit 7 654321 0 - HWUPI HSOFI RXRSMI RSMEDI RSTI DDISCI DCONNI UHINT Read/write R R/W R/W R/W R/W R/W R/W R/W Initial value 0 000000 0 Bit 7 65 4 3 21 0 HWUPE HSOFE RXRSME RSMEDE RSTE DDISCE DCONNE UHIEN Read/write R R/W R/W R/W R/W R/W R/W R/W Initial value 0 0 0 0 0 0 0 0 |
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