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EP2C8A Datasheet(PDF) 161 Page - Altera Corporation |
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EP2C8A Datasheet(HTML) 161 Page - Altera Corporation |
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161 / 168 page ![]() Altera Corporation 5–71 February 2008 Cyclone II Device Handbook, Volume 1 DC Characteristics and Timing Specifications 2.5-V 140 140 155 ps 1.8-V 115 115 165 ps 1.5-V 745 745 770 ps SSTL-2 Class I 60 60 75 ps SSTL-2 Class II 60 60 80 ps SSTL-18 Class I 60 130 130 ps SSTL-18 Class II 60 135 135 ps HSTL-18 Class I 60 115 115 ps HSTL-18 Class II 75 75 100 ps HSTL-15 Class I 150 150 150 ps HSTL-15 Class II 135 135 155 ps Differential SSTL-2 Class I 60 60 75 ps Differential SSTL-2 Class II 60 60 80 ps Differential SSTL-18 Class I 60 130 130 ps Differential SSTL-18 Class II 60 135 135 ps Differential HSTL-18 Class I 60 115 115 ps Differential HSTL-18 Class II 75 75 100 ps Differential HSTL-15 Class I 150 150 150 ps Differential HSTL-15 Class II 135 135 155 ps LVDS 60 60 60 ps Simple RSDS 60 70 70 ps Mini-LVDS 60 60 60 ps Notes to Table 5–56: (1) The DCD specification is characterized using the maximum drive strength available for each I/O standard. (2) Numbers are applicable for commercial, industrial, and automotive devices. Table 5–57. Maximum for DDIO Output on Row Pins with PLL in the Clock Path Notes (1), (2) (Part 1 of 2) Row Pins with PLL in the Clock Path C6 C7 C8 Unit LVCMOS 270 310 310 ps LVTTL 285 305 335 ps 2.5-V 180 180 220 ps 1.8-V 165 175 205 ps Table 5–56. Maximum DCD for SDR Output on Column I/O Notes (1), (2) (Part 2 of 2) Column I/O Output Standard C6 C7 C8 Unit |
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