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DS2152L Datasheet(PDF) 62 Page - Dallas Semiconductor |
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DS2152L Datasheet(HTML) 62 Page - Dallas Semiconductor |
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62 / 94 page ![]() DS2152 62 of 93 RFFR: RECEIVE FDL FIFO REGISTER (Address=05 Hex) (MSB) (LSB) FDL7 FDL6 FDL5 FDL4 FDL3 FDL2 FDL1 FDL0 SYMBOL POSITION NAME AND DESCRIPTION FDL7 RFFR.7 FDL Data Bit 7. MSB of a HDLC packet data byte. FDL6 RFFR.6 FDL Data Bit 6. FDL5 RFFR.5 FDL Data Bit 5. FDL4 RFFR.4 FDL Data Bit 4. FDL3 RFFR.3 FDL Data Bit 3. FDL2 RFFR.2 FDL Data Bit 2. FDL1 RFFR.1 FDL Data Bit 1. FDL0 RFFR.0 FDL Data Bit 0. LSB of a HDLC packet data byte. TPRM: TRANSMIT PRM REGISTER (Address=06 Hex) (MSB) (LSB) - - - - - TEMPTY TFULL UDR SYMBOL POSITION NAME AND DESCRIPTION - TPRM.7 Not Assigned. Could be any value when read. - TPRM.6 Not Assigned. Could be any value when read. - TPRM.5 Not Assigned. Could be any value when read. - TPRM.4 Not Assigned. Could be any value when read. - TPRM.3 Not Assigned. Could be any value when read. TEMPTY TPRM.2 Transmit FIFO Empty. A real-time bit that is set high when the FIFO is empty. TFULL TPRM.1 Transmit FIFO Full. A real-time bit that is set high when the FIFO is full. UDR TPRM.0 Underrun. Set when the transmit FIFO unwantedly empties out and an abort is automatically sent. NOTE: The UDR bit is latched and will be cleared when read. |
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