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DS2152L Datasheet(PDF) 69 Page - Dallas Semiconductor |
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DS2152L Datasheet(HTML) 69 Page - Dallas Semiconductor |
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69 / 94 page ![]() DS2152 69 of 93 RDNCD: RECEIVE DOWN CODE DEFINITION REGISTER (Address=15 Hex) (MSB) (LSB) C7 C6 C5 C4 C3 C2 C1 C0 SYMBOL POSITION NAME AND DESCRIPTION C7 RDNCD.7 Receive Down Code Definition Bit 7. First bit of the repeating pattern. C6 RDNCD.6 Receive Down Code Definition Bit 6. A Don’t Care if a 1-bit length is selected. C5 RDNCD.5 Receive Down Code Definition Bit 5. A Don’t Care if a 1 or 2- bit length is selected. C4 RDNCD.4 Receive Down Code Definition Bit 4. A Don’t Care if a 1 to 3- bit length is selected. C3 RDNCD.3 Receive Down Code Definition Bit 3. A Don’t Care if a 1 to 4- bit length is selected. C2 RDNCD.2 Receive Down Code Definition Bit 2. A Don’t Care if a 1 to 5- bit length is selected. C1 RDNCD.1 Receive Down Code Definition Bit 1. A Don’t Care if a 1 to 6- bit length is selected. C0 RDNCD.0 Receive Down Code Definition Bit 0. A Don’t Care if a 1 to 7- bit length is selected. 13.0 TRANSMIT TRANSPARENCY Each of the 24 T1 channels in the transmit direction of the DS2152 can be either forced to be transparent or, in other words, can be forced to stop Bit 7 Stuffing and/or Robbed Signaling from overwriting the data in the channels. Transparency can be invoked on a channel by channel basis by properly setting the TTR1, TTR2, and TTR3 registers. TTR1/TTR2/TTR3: TRANSMIT TRANSPARENCY REGISTER (Address=39 to 3B Hex) (MSB) (LSB) CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 TTR1 (39) CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9 TTR2 (3A) CH24 CH23 CH22 CH21 CH20 CH19 CH18 CH17 TTR3 (3B) SYMBOL POSITION NAME AND DESCRIPTION CH24 TTR3.7 Transmit Transparency Registers. 0=this DS0 channel is not transparent CH1 TTR1.0 1=this DS0 channel is transparent |
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