Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

INA210 Datasheet(PDF) 13 Page - Texas Instruments

Click here to check the latest version.
Part # INA210
Description  High or Low Side, Bi-Directional CURRENT/POWER MONITOR with Two-Wire Interface
PDF  39 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

INA210 Datasheet(HTML) 13 Page - Texas Instruments

Back Button INA210 Datasheet HTML 9Page - Texas Instruments INA210 Datasheet HTML 10Page - Texas Instruments INA210 Datasheet HTML 11Page - Texas Instruments INA210 Datasheet HTML 12Page - Texas Instruments INA210 Datasheet HTML 13Page - Texas Instruments INA210 Datasheet HTML 14Page - Texas Instruments INA210 Datasheet HTML 15Page - Texas Instruments INA210 Datasheet HTML 16Page - Texas Instruments INA210 Datasheet HTML 17Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 13 / 39 page
background image
SCL
SDA
t
(LOW)
t
R
t
F
t
(HDSTA)
t
(HDSTA)
t
(HDDAT)
t
(BUF)
t
(SUDAT)
t
(HIGH)
t
(SUSTA)
t
(SUSTO)
P
S
S
P
INA220
www.ti.com
SBOS459D – JUNE 2009 – REVISED SEPTEMBER 2010
High-Speed Two-Wire Mode
The master then generates a repeated start condition
(a repeated start condition has the same timing as
When the bus is idle, both the SDA and SCL lines are
the start condition). After this repeated start condition,
pulled high by the pull-up devices. The master
the protocol is the same as F/S mode, except that
generates a start condition followed by a valid serial
transmission speeds up to 3.4Mbps are allowed.
byte
containing
High-Speed
(HS)
master
code
Instead of using a stop condition, repeated start
00001XXX.
This
transmission
is
made
in
fast
conditions should be used to secure the bus in
(400kbps) or standard (100kbps) (F/S) mode at no
HS-mode. A stop condition ends the HS-mode and
more
than
400kbps.
The
INA220
does
not
switches all the internal filters of the INA220 to
acknowledge
the
HS
master
code,
but
does
support the F/S mode.
recognize it and switches its internal filters to support
3.4Mbps operation.
Figure 18. Bus Timing Diagram
Bus Timing Diagram Definitions
FAST MODE
HIGH-SPEED MODE
PARAMETER
MIN
MAX
MIN
MAX
UNITS
SCL Operating Frequency
f(SCL)
0.001
0.4
0.001
3.4
MHz
Bus Free Time Between STOP and START
t(BUF)
600
160
ns
Condition
Hold time after repeated START condition.
t(HDSTA)
100
100
ns
After this period, the first clock is generated.
Repeated START Condition Setup Time
t(SUSTA)
100
100
ns
STOP Condition Setup Time
t(SUSTO)
100
100
ns
Data Hold Time
t(HDDAT)
0
0
ns
Data Setup Time
t(SUDAT)
100
10
ns
SCL Clock LOW Period
t(LOW)
1300
160
ns
SCL Clock HIGH Period
t(HIGH)
600
60
ns
Clock/Data Fall Time
tF
300
160
ns
Clock/Data Rise Time
tR
300
160
ns
Clock/Data Rise Time for SCLK
≤ 100kHz
tR
1000
ns
Copyright © 2009–2010, Texas Instruments Incorporated
Submit Documentation Feedback
13
Product Folder Link(s): INA220



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com