e

x

( )

C

25

R

=

T

R

°

298

1

273

+

C

°

T

1

E

-

¹

·

©

§

30171831

LM3556

www.ti.com

SNVS796C – AUGUST 2011 – REVISED APRIL 2013

Table 3. Recommended Inductors

Manufacturer

L

Part Number

Dimensions (L×W×H)

TOKO

1 µH

FDSD0312

3 mm x 3 mm x 1.2 mm

4.5A

43 m

Ω

TOKO

1 µH

DFE252010C

2.5 mm × 2 mm × 1 mm

3.4A

60 m

Ω

TOKO

1 µH

DFE252012C

2.5 mm × 2 mm × 1.2 mm

3.8A

45 m

Ω

NTC Thermistor Selection

The TEMP pin is a comparator input for flash LED thermal sensing. NTC Mode is intended to monitor an external

thermistor which monitors LED temperature and prevents LED overheating. An internal comparator checks the

voltage on the TEMP pin against the trip point programmed in the NTC Settings Register (0x02). The thermistor

is driven by an internally regulated current source, and the voltage on the TEMP pin is related to the source

current and the NTC resistance.

NTC thermistors have a temperature to resistance relationship of:

(4)

where

Layout Recommendations

The high switching frequency and large switching currents of the LM3556 make the choice of layout important.

The following steps should be used as a reference to ensure the device is stable and maintains proper LED

current regulation across its intended operating voltage and current range.

capacitor conducts the driver currents during the low-side MOSFET turn-on and turn-off and can see current

spikes over 1A in amplitude. Connecting the input capacitor through short, wide traces to both the IN and

line.

circuitry.

3. Connect the inductor on the top layer close to the SW pin. There should be a low-impedance connection

from the inductor to SW due to the large DC inductor current, and at the same time the area occupied by the

SW node should be small so as to reduce the capacitive coupling of the high dV/dt present at SW that can

couple into nearby traces.

4. Avoid routing logic traces near the SW node so as to avoid any capacitively coupled voltages from SW onto

any high-impedance logic lines such as TORCH, STROBE, HWEN, TEMP, SDA, and SCL. A good approach

is to insert an inner layer GND plane underneath the SW node and between any nearby routed traces. This

creates a shield from the electric field generated at SW.

5. Terminate the Flash LED cathodes directly to the GND pin of the LM3556. If possible, route the LED returns

with a dedicated path so as to keep the high amplitude LED currents out of the GND plane. For Flash LEDs

that are routed relatively far away from the LM3556, a good approach is to sandwich the forward and return

current paths over the top of each other on two layers. This will help in reducing the inductance of the LED

current paths.

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