R/W

Bit 0

1

Bit 1

1

Bit 2

0

Bit 3

0

Bit 4

0

Bit 5

1

Bit 7

1

Bit 6

MSB

LSB

I

2

C Slave Address (chip address)

start

msb Chip Address lsb

w

ack

msb Register Add lsb

ack

msb

DATA

lsb

ack

stop

ack from slave

ack from slave

ack from slave

SCL

SDA

start

Id = 63h

w

ack

addr = 0Ah

ack

ack

Data = 03h

stop

LM3556

SNVS796C – AUGUST 2011 – REVISED APRIL 2013

www.ti.com

eighth bit which is a data direction bit (R/W). The LM3556 7-bit address is 0x63. For the eighth bit, a '0' indicates

a WRITE and a '1' indicates a READ. The second byte selects the register to which the data will be written. The

third byte contains data to write to the selected register.

Figure 33. Write Cycle

w = write (SDA = "0")

r = read (SDA = "1")

ack = acknowledge (SDA pulled down by either master or slave)

id = chip address, 63h for LM3556

sends the 7-bit address followed by an eighth read or write bit (R/W). R/W = 0 indicates a WRITE and R/W = 1

indicates a READ. The second byte following the device address selects the register address to which the data

will be written. The third byte contains the data for the selected register.

Transferring Data

Every byte on the SDA line must be eight bits long, with the most significant bit (MSB) transferred first. Each byte

of data must be followed by an acknowledge bit (ACK). The acknowledge related clock pulse (9th clock pulse) is

generated by the master. The master releases SDA (HIGH) during the 9th clock pulse. The LM3556 pulls down

SDA during the 9th clock pulse, signifying an acknowledge. An acknowledge is generated after each byte has

been received.

16

Submit Documentation Feedback

Copyright © 2011–2013, Texas Instruments Incorporated

Product Folder Links: LM3556