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82374EB Datasheet(PDF) 120 Page - Intel Corporation |
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82374EB Datasheet(HTML) 120 Page - Intel Corporation |
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120 / 208 page  82374EB82374SB 534 EISA MASTER BACK-OFF During EISA master transfer where the master and slave size is mis-matched the EISA master is required to back-off the bus on the first falling edge of BCLK after START is negated The EISA master floats its START BE 30 and data lines at this time This allows the ESC to performs translation cycle The master must back-off the bus if a masterslave data size mis-match is determined regardless if data size translation is performed At the end of the data size translation or transfer cycle control is transferred back to the bus master by the ESC by driving EX32 and EX16 active on the falling edge of BCLK before the rising edge of BCLK that the last CMD is negated An additional BCLK is added at the end of the transfer to allow the exchanging of cycle control to occur 290476 – 69 Figure 6 EISA Master Back Off Cycle 120 |
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