82374EB datasheet(176/208 Pages) INTEL

176 / 208 page

82374EB82374SB

110 PCEBESC INTERFACE

The PCEBESC interface (Figure 26) provides the inter-chip communications between the PCEB and ESC

The interface provides control information between the two components for PCIEISA arbitration data size

translations (controlling the PCEB’s EISA data swap logic) and interrupt acknowledge cycles

290476 – 86

NOTE

STPGNT

is only on the 82374SB (and companion 82375SB)

Figure 26 PCEBESC Interface Signals

111 Arbitration Control Signals

The PCEB contains the arbitration circuitry for the PCI Bus and the ESC contains the arbitration circuitry for the

EISA Bus The PCEBESC Interface contains a set of arbitration control signals (EISAHOLD EISAHOLDA

NMFLUSH

and PEREQ

INTA ) that synchronize bus arbitration and ownership changes between the

two bus environments The signals also force PCI device data buffer flushing if needed to maintain data

coherency during EISA Bus ownership changes

The PCEB is the default owner of the EISA Bus If another EISAISA master or DMA wants to use the bus the

ESC asserts EISAHOLD to instruct the PCEB to relinquish EISA Bus ownership The PCEB completes any

current EISA Bus transaction tri-states its EISA Bus signals and asserts EISAHOLDA to inform the ESC that

the PCEB is off the bus

For ownership changes other than for a refresh cycle the ESC asserts the NMFLUSH

signal to the PCEB

(for one PCICLK) to instruct the PCEB to flush its Line Buffers pointing to the PCI Bus The assertion of

NMFLUSH

also instructs the PCEB to initiate flushing and to temporarily disable system buffers on the PCI

Bus (via MEMREQ

MEMACK and FLSHREQ ) The buffer flushing maintains data coherency in the event

that the new EISA Bus master wants to access the PCI Bus Buffer flushing also prevents dead-lock conditions

between the PCI Bus and EISA Bus Since the ESCPCEB does not know ahead of time whether the new

master is going to access the PCI Bus or a device on the EISA Bus buffers pointing to the PCI Bus are always

flushed when there is a change of EISA Bus ownership except for refresh cycles For refresh cycles the ESC

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82374EB Datasheet(PDF) 176 Page - Intel Corporation