82374EB datasheet(177/208 Pages) INTEL

177 / 208 page

82374EB82374SB

controls the cycle and thus knows that the cycle is not an access to the PCI Bus and does not initiate a flush

request to the PCEB After a refresh cycle the ESC always surrenders control of the EISA Bus back to the

PCEB

NMFLUSH

is a bi-directional signal that is negated by the ESC when buffer flushing is not being requested

The ESC asserts NMFLUSH

to request buffer flushing When the PCEB samples NMFLUSH

asserted it

starts driving the signal in the asserted state and begins the buffer flushing process (The ESC tristates

NMFLUSH

after asserting if for the initial 1 PCICLK period) The PCEB keeps NMFLUSH

asserted until all

buffers are flushed and then it negates the signal for 1 PCICLK When the ESC samples NMFLUSH

negated

it starts driving the signal in the negated state completing the handshake When the ESC samples

NMFLUSH

negated it grants ownership to the winner of the EISA Bus arbitration (at the time NMFLUSH

was negated) Note that for a refresh cycle NMFLUSH

is not asserted by the ESC

290476 – 87

Figure 27 NMFLUSH

Protocol

When the EISA master completes its transfer and gets off the bus (ie removes its request to the ESC) the

ESC negates EISAHOLD and the PCEB in turn negates EISAHOLDA At this point the PCEB resumes its

default ownership of the EISA Bus

If a PCI master requests access to the EISA Bus while the bus is owned by a master other than the PCEB the

PCEB retries the PCI cycle and requests ownership of the EISA Bus by asserting PEREQ

INTA

to the

ESC PEREQ

INTA

is a dual function signal that is a PCEB request for the EISA Bus (PEREQ

function)

when EISAHOLDA is asserted In response to the PCEB request for EISA Bus ownership the ESC removes

the grant to the EISA master When the EISA master completes its current transactions and relinquishes the

bus (removes its bus request) the ESC negates EISAHOLD and the PCEB in turn negates EISAHOLDA At

this point a grant can be given to the PCI device for a transfer to the EISA Bus Note that the INTA

function

of the PEREQ

INTA

signal is described in Section 115 Interrupt Acknowledge Control

177

82374EB Datasheet(PDF) 177 Page - Intel Corporation

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