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UPD7228 Datasheet(PDF) 18 Page - NEC |
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UPD7228 Datasheet(HTML) 18 Page - NEC |
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18 / 39 page ![]() Data Sheet S10299EJ4V0DS00 18 µµµµ PD16434 (3) 16-time-division (multi-chip configuration) Bank 0 and bank 1 are used in a pair, and the contents are read out to the column driver as 50 × 16-bit display data. The row driver signals, output from each µ PD16434, are R0 to R7 or R8 to R15. Figure 2–8 shows bits correspondence for the row driver and column driver for the data memory for each chip. Figure 2–8. Data Memory (16-Time-Division, Multi-chip) R8 R9 R10 R11 R12 R13 R14 R15 C49 C48 C1 C0 0 1 2 3 4 5 6 7 Corresponding row signal R0 R1 R2 R3 R4 R5 R6 R7 31H 30H 01H 00H bit 0 1 2 3 4 5 6 7 To colmn driver Bank 0 Bank 1 |
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