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TPS717 Datasheet(PDF) 16 Page - Texas Instruments

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Part # TPS717
Description  TPS717xx Low-Noise, High-Bandwidth PSRR,Low-Dropout, 150-mA Linear Regulator
PDF  42 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS717 Datasheet(HTML) 16 Page - Texas Instruments

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1
2
OUT
REF
R
R * (V
/ V
1)

TPS717xx
GND
EN
NR
IN
OUT
V
IN
V
OUT
1 F
m
Ceramic
V
EN
Optional 1- F input
capacitor. May improve
source impedance, noise
or PSRR.
m
Optional 0.01- F bypass
capacitor to reduce
output noise and
increase PSRR.
m
TPS71701
GND
EN
FB
IN
OUT
V
IN
V
OUT
1 F
m
Ceramic
V
EN
R
1
R
2
Optional 1- F input
capacitor. May improve
source impedance, noise
or PSRR.
m
V
=
N
11.5
xV
OUT
mVRMS
V
TPS717
SBVS068H – FEBRUARY 2006 – REVISED JANUARY 2015
www.ti.com
Application Information (continued)
8.1.4 Output Noise
In most LDOs, the band gap is the dominant noise source. If a noise reduction capacitor (CNR) is used with the
TPS717xx, the band gap does not contribute significantly to noise. Instead, noise is dominated by the output
resistor divider and the error amplifier input. To minimize noise in a given application, use a 0.01-
μF (minimum)
noise reduction capacitor; for the adjustable version, smaller value resistors in the output resistor divider reduce
noise. A parallel combination that gives 2.5
μA of divider current has the same noise performance as a fixed
voltage version.
Equation 2 approximates the total noise referred to the feedback point (FB pin) when CNR = 0.01 μF:
(2)
8.2 Typical Applications
8.2.1 Application for Fixed Voltage Versions and Adjustable Voltage Version
Figure 33 shows the basic circuit connections for the fixed voltage options. Figure 34 gives the connections for
the adjustable output version (TPS71701). Note that the NR pin is not available on the adjustable version.
Figure 33. Typical Application Circuit
Figure 34. Typical Application Circuit
(Fixed Voltage Versions)
(Adjustable Voltage Version)
8.2.1.1 Design Requirements
Table 2 summarizes the design requirements for Figure 36.
Table 2. Design Parameters
PARAMETER
DESIGN REQUIREMENT
Input voltage
3.3 V, ±10%
Output voltage
2.8 V, ±5%
Output current
100 mA typical, 150 mA peak
Output voltage transient deviation
5%
Maximum ambient temperature
85°C
8.2.1.2 Detailed Design Procedure
For the adjustable version (TPS71701), the NR pin is replaced with a feedback (FB) pin. The voltage on this pin
sets the output voltage and is determined by the values of R1 and R2. The values of R1 and R2 can be calculated
for any voltage using the formula given in Equation 3:
(3)
The value of R2 directly impacts the operation of the device and must be chosen in the range of approximately
160 k
Ω to 320 kΩ. Sample resistor values for common output voltages are shown in Table 3.
16
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Product Folder Links: TPS717



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