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AM4376 Datasheet(PDF) 111 Page - Texas Instruments |
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AM4376 Datasheet(HTML) 111 Page - Texas Instruments |
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111 / 261 page  AM4376, AM4377, AM4378, AM4379 www.ti.com SPRS851B – JUNE 2014 – REVISED APRIL 2015 DC Electrical Characteristics (continued) over recommended ranges of supply voltage and operating temperature (unless otherwise noted) (1) PARAMETER MIN NOM MAX UNIT VHYS Hysteresis voltage at an input 0.07 V VI = 1.8 V 0.1 II Input leakage current µA VI = 3.3 V 2 All other LVCMOS pins (VDDSHVx = 1.8 V; x=1-11) High-level input voltage 0.65 * VIH V VDDSHVx Low-level input voltage 0.35 * VIL V VDDSHVx VHYS Hysteresis voltage at an input 0.18 0.305 V High-level output voltage, driver enabled, pullup IOH = 6 mA VDDSHVx - VOH V or pulldown disabled 0.45 Low-level output voltage, driver enabled, pullup IOL = 6 mA 0.45 VOL V or pulldown disabled Input leakage current, Receiver disabled, pullup or pulldown -8.4 8.4 inhibited II µA Input leakage current, Receiver disabled, pullup enabled -161 -100 -52 Input leakage current, Receiver disabled, pulldown enabled 52 100 170 Total leakage current through the terminal connection of a driver- -8.4 8.4 IOZ receiver combination that may include a pullup or pulldown. The µA driver output is disabled and the pullup or pulldown is inhibited. All other LVCMOS pins (VDDSHVx = 3.3 V; x=1-11) VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V VHYS Hysteresis voltage at an input 0.265 0.44 V High-level output voltage, driver enabled, pullup IOH = 6 mA VDDSHVx - VOH V or pulldown disabled 0.45 Low-level output voltage, driver enabled, pullup IOL = 6 mA 0.45 VOL V or pulldown disabled Input leakage current, Receiver disabled, pullup or pulldown -18 18 inhibited II µA Input leakage current, Receiver disabled, pullup enabled -243 -100 -19 Input leakage current, Receiver disabled, pulldown enabled 51 110 210 Total leakage current through the terminal connection of a driver- -18 18 IOZ receiver combination that may include a pullup or pulldown. The µA driver output is disabled and the pullup or pulldown is inhibited. XTALIN (OSC0) High-level input voltage 0.65 * VIH V VDDS_OSC Low-level input voltage 0.35 * VIL V VDDS_OSC RTC_XTALIN (OSC1) High-level input voltage 0.65 * VIH V VDDS_RTC Low-level input voltage 0.35 * VIL V VDDS_RTC (1) The interfaces or signals described in this table correspond to the interfaces or signals available in multiplexing mode 0. All interfaces or signals multiplexed on the terminals described in this table have the same DC electrical characteristics. (2) For mapping to the LPDDR2 interface terminal name, see the AM437x Sitara Processors Technical Reference Manual (SPRUHL7). (3) The DDR_RESETn terminal supports fail-safe operation. (4) The input voltage thresholds for this input are not a function of VDDSHV3. Copyright © 2014–2015, Texas Instruments Incorporated Specifications 111 Submit Documentation Feedback Product Folder Links: AM4376 AM4377 AM4378 AM4379 |
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