AS3649

Datasheet - Detailed Descr i p ti on

www.ams.com/AS3649

1.0-2

30 - 39

4

load_balance_on

0R/W

Balance the current sources (up to +/-15% of set current) to improve

application efficiency for unmatched LED forward voltages - see Load

Balancing on page 17

0

disabled

1

enabled

5

const_v_mode

0R/W

Enables Constant output voltage mode

0

Normal operation defined by mode_setting

1

5V constant voltage mode on VOUT1/2;

LED current can be controlled by registers mode_setting,

led_current1 and led_current2 as in normal operating mode, but

the ramping up/down of the current sources is disabled

(instantaneous on/off of the LED current)

Table 17. ADC Result Register

Addr: Ah

ADC Result Register

This register reports the actual set LED current

Bit

Bit Name

Default

Access

Description

7:0

adc_result

NA

R

Result of ADC conversion for channel adc_channel

Table 18. ADC Result LSBs Register

Addr: Bh

ADC Result LSBs Register

This register reports the actual set LED current

Bit

Bit Name

Default

Access

Description

1:0

adc_result_lsbs

NA

R

Result of ADC conversion for channel adc_channel

Table 19. Minimum LED Current Register

Addr: Eh

Minimum LED Current Register

This register reports the minimum LED current from the last operation cycle

Bit

Bit Name

Default

Access

Description

7:0

led_current_min

123

00h

R

see Current Reduction by VIN Measurements in Flash Mode and

Diagnostic Pulse (see page 15) and Figure 20 on page 16

1. Only the current through LED_OUT1 is reported.

2. As the internal change of this register is asynchronous to the readout, it is recommended to readout the register after the flash pulse.

The register will store the minimum current through the LED after e.g. a previous flash. This current can be used for a subsequent flash

pulse for a safe operating range.

3. This register is only set if an actual current reduction happens (status_uvlo (see page 28)=1) otherwise led_current_min=0.

Addr: 9

This register defines the PWM mode (e.g. for indicator) and 4/1MHz mode switching

Bit

Bit Name

Default

Access

Description