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DLPC200 Datasheet(PDF) 8 Page - Texas Instruments |
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DLPC200 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 52 page  DLPC200 DLPS014E – APRIL 2010 – REVISED AUGUST 2014 www.ti.com Pin Functions (continued) PIN I/O CLOCK SYSTEM DESCRIPTION TYPE(1) NAME NUMBER CONTROL INTERFACES (I2C, USB, SPI) USB clock input (48 MHz), feeds a PLL (if not used, apply 10-k Ω USB_CLK B15 I3 pulldown to DGND) USB I/F FIFO programmable level (if not used, apply 10-k Ω pulldown USB_CTRL0 B17 I3 USB_CLK to DGND) USB_CTRL1 A26 I3 USB_CLK USB I/F FIFO-full flag (if not used, apply 10-k Ω pulldown to DGND) USB I/F FIFO-empty flag (if not used, apply 10-k Ω pulldown to USB_CTRL2 D22 I3 USB_CLK DGND) USB_CTRL3 C19 I3 USB_CLK Reserved for future use (if not used, apply 10-k Ω pulldown to DGND) USB_CTRL4 D16 I3 USB_CLK Reserved for future use (if not used, apply 10-k Ω pulldown to DGND) USB_CTRL5 G17 I3 USB_CLK Reserved for future use (if not used, apply 10-k Ω pulldown to DGND) USB_FD0 G16 USB_FD1 C26 USB_FD2 F17 USB_FD3 C22 USB_FD4 E18 USB_FD5 B18 USB_FD6 F18 USB_FD7 E19 B2 USB_CLK USB interface data bus (if not used, apply 10-k Ω pulldown to DGND) USB_FD8 B23 USB_FD9 D25 USB_FD10 C21 USB_FD11 D24 USB_FD12 B19 USB_FD13 E25 USB_FD14 G18 USB_FD15 C15 USB I/F FIFO output enable for reads (if not used, apply 10-k Ω USB_PA02 D23 O3 USB_CLK pullup to 3.3 V) USB_PA04 G15 O3 USB_CLK USB I/F FIFO address(0) (if not used, apply 10-k Ω pullup to 3.3 V) USB_PA05 A22 O3 USB_CLK USB I/F FIFO address(1) (if not used, apply 10-k Ω pullup to 3.3 V) USB_PA06 A25 O3 USB_CLK USB I/F FIFO packet end trigger USB_RDY0 C16 O3 USB_CLK USB I/F FIFO read enable (if not used, apply 10-k Ω pullup to 3.3 V) USB_RDY1 C17 O3 USB_CLK USB I/F FIFO write enable (if not used, apply 10-k Ω pullup to 3.3 V) USB_RDY2 B26 O3 USB_CLK Reserved for future use (if not used, apply 10-k Ω pullup to 3.3 V) USB_RSVD_14 A15 I3 USB_CLK Reserved for future use (if not used, apply 10-k Ω pulldown to DGND) I2C_SCL C25 B2 Master I2C clock - 400 kHz. Requires external pullup I2C_SDA D18 B2 I2C_SCL Master I2C data - 400 kHz. Requires external pullup HDMI EDID I2C clock. 400 kHz. Requires external pullup (if EDID is EDID_I2C_SCL F8 B2 not used, must be pulled up to 3.3 V through a 47-k Ω resistor) HDMI EDID I2C data. 400-kHz. Requires external pullup (if EDID is EDID_I2C_SDA D6 B2 EDID_I2C_SCL not used, must be pulled up to 3.3 V through a 47-k Ω resistor.) SLAVE_SPI_CLK B14 I3 Slave SPI clock SLAVE_SPI_CS C14 I3 SLAVE_SPI_CLK Slave SPI chip select; weak pullup applied SLAVE_SPI_MISO D14 O3 SLAVE_SPI_CLK Slave SPI data OUT SLAVE_SPI_MOSI E14 I3 SLAVE_SPI_CLK Slave SPI data IN; weak pullup applied SLAVE_SPI_SOP F21 I3 SLAVE_SPI_CLK Reserved for future use SLAVE_SPI_ACK D20 O3 SLAVE_SPI_CLK Slave SPI data busy 8 Submit Documentation Feedback Copyright © 2010–2014, Texas Instruments Incorporated Product Folder Links: DLPC200 |
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