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DLPC900ZPC Datasheet(PDF) 7 Page - Texas Instruments |
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DLPC900ZPC Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 72 page  DLPC900 www.ti.com DLPS037A – OCTOBER 2014 – REVISED AUGUST 2015 DMD LVDS Interface Pin Functions (1) (2) PIN I/O CLK I/O TYPE DESCRIPTION POWER SYSTEM NAME NUMBER DCKA_P V4 DCKA_P VDD18 O7 DMD, LVDS interface channel A, differential clock DCKA_N V3 DCKA_N SCA_P V2 DCKA_P VDD18 O7 DMD, LVDS interface channel A, differential serial control SCA_N V1 DCKA_N DDA_P_15 P4 DDA_N_15 P3 DDA_P_14 P2 DDA_N_14 P1 DDA_P_13 R4 DDA_N_13 R3 DDA_P_12 R2 DDA_N_12 R1 DDA_P_11 T4 DDA_N_11 T3 DDA_P_10 T2 DDA_N_10 T1 DDA_P_9 U4 DDA_N_9 U3 DDA_P_8 U2 DDA_N_8 U1 DCKA_P VDD18 O7 DMD, LVDS interface channel A, differential serial data DCKA_N DDA_P_7 W4 DDA_N_7 W3 DDA_P_6 W2 DDA_N_6 W1 DDA_P_5 Y2 DDA_N_5 Y1 DDA_P_4 Y4 DDA_N_4 Y3 DDA_P_3 AA2 DDA_N_3 AA1 DDA_P_2 AA4 DDA_N_2 AA3 DDA_P_1 AB2 DDA_N_1 AB1 DDA_P_0 AC2 DDA_N_0 AC1 DCKB_P J3 DCKB_P VDD18 O7 DMD, LVDS interface channel B, differential clock DCKB_N J4 DCKB_N SCB_P J1 DCKB_P VDD18 O7 DMD, LVDS interface channel B, differential serial control SCB_N J2 DCKB_N (1) Several options allow reconfiguration of the DMD interface in order to better optimize board layout. The DLPC900 can swap channel A with channel B. The DLPC900 can also swap the data bit order within each channel independent of swapping the A and B channels. (2) The DLPC900 is a full-bus DMD signaling interface. Figure 15 shows the controller connections for this configuration. Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: DLPC900 |
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