PEF2256 datasheet(30/518 Pages) INFINEON

30 / 518 page

FALC

®56

PEF 2256 H/E

External Signals

User’s Manual

DS1.1, 2003-10-23

Hardware Description

Table 2

Pin Definitions - Line Interface

Pin or

Ball No.

Name

Type

Buffer

Type

Function

3 (C2)

RL1

analog Line Receiver Input 1

Analog input from the external transformer.

Selected by LIM1.DRS = 0.

RDIP

digital

Receive Data Input Positive

Digital input for received dual-rail PCM(+)

route signal which is latched with the

internally recovered receive route clock. An

internal DPLL extracts the receive route clock

from the incoming data pulses. The duty cycle

of the received signal has to be close to 50%.

The dual-rail mode is selected if

LIM1.DRS = 1

B and FMR0.RC1 = 1B.

Input polarity is selected by bit RC0.RDIS

(active low by default), line coding is selected

by FMR0.RC(1:0).

ROID

digital

Receive Optical Interface Data

Unipolar data received from a fiber-optical

interface. Latching of data is done with the

falling edge of RCLKI. Input polarity is

selected by bit RC0.RDIS.

The single-rail mode is selected if

LIM1.DRS = 1

B and FMR0.RC1 = 0B.

If CMI coding is selected

(FMR0.RC(1:0) = 01

B), an internal DPLL

recovers clock and data, no clock signal on

RCLKI is required.

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