VX6854LC datasheet(3/114 Pages) STMICROELECTRONICS

3 / 114 page

DocID027110 Rev 2

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VX6854LC

Contents

4.6

Integration time and gain registers [0x0200 to 0x02FF] . . . . . . . . . . . . . . 34

4.7

Video timing registers [0x0300 to 0x03FF] . . . . . . . . . . . . . . . . . . . . . . . . 35

4.8

Image scaling registers [0x0400 to 0x04FF] . . . . . . . . . . . . . . . . . . . . . . 36

4.9

Image compression registers [0x0500 to 0x05FF] . . . . . . . . . . . . . . . . . . 37

4.10

Test pattern registers [0x0600 to 0x06FF] . . . . . . . . . . . . . . . . . . . . . . . . 37

4.11

Fifo water mark registers [0x0700 to 0x0701] . . . . . . . . . . . . . . . . . . . . . 38

4.12

DPHY registers [0x0810 to 0x0811] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

4.13

Binning registers [0x0900 to 0x0902] . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

4.14

Data transfer registers [0x0A00 to 0x0A02] . . . . . . . . . . . . . . . . . . . . . . . 39

4.15

Shading correction registers [0x0B00 to 0x0B00] . . . . . . . . . . . . . . . . . . 39

4.16

Defect correction registers [0x0B05 to 0x0B09] . . . . . . . . . . . . . . . . . . . . 40

4.17

EDoF registers [0x0B80 to 0x0B8A] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

4.18

Color feedback registers [0x0B8C to 0x0B95] . . . . . . . . . . . . . . . . . . . . . 41

4.19

Integration time and gain parameter limit registers [0x1000 to 0x10FF] . 42

4.20

Video timing parameter limit registers [0x1100 to 0x11FF] . . . . . . . . . . . . 43

4.21

Image scaling parameter limit registers [0x1200 to 0x12FF] . . . . . . . . . . 47

4.22

Image compression parameter registers [0x1300 to 0x13FF] . . . . . . . . . 47

4.23

Color matrix registers [0x1400 to 0x14FF] . . . . . . . . . . . . . . . . . . . . . . . . 47

4.24

FIFO capability registers [0x1500 to 0x15FF] . . . . . . . . . . . . . . . . . . . . . 48

4.25

CSI lane mode capability registers [0x1600 to 0x1602] . . . . . . . . . . . . . . 48

4.26

Binning capability registers [0x1700 to 0x1719] . . . . . . . . . . . . . . . . . . . . 49

4.27

Data transfer capability registers [0x1800 to 0x1800] . . . . . . . . . . . . . . . 49

4.28

Shading correction capability registers [0x1900 to 0x1900] . . . . . . . . . . . 50

4.29

Defect correction capability registers [0x1903 to 0x1903] . . . . . . . . . . . . 50

4.30

EDoF capability registers [0x1980 to 0x19C0] . . . . . . . . . . . . . . . . . . . . . 50

4.31

Color feedback capability registers [0x1987 to 0x1987] . . . . . . . . . . . . . . 51

4.32

Manufacturer specific registers [0x3000 to 0x3FFF] . . . . . . . . . . . . . . . . 51

Video data interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

5.1

Frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Video timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

6.1

Output size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

6.1.1

Programmable addressable region of the pixel array . . . . . . . . . . . . . . 55

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