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VX6854LC Datasheet(PDF) 33 Page - STMicroelectronics

Part # VX6854LC
Description  QXGA EDOF camera module
PDF  114 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VX6854LC Datasheet(HTML) 33 Page - STMicroelectronics

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VX6854LC
Register map
69
4.5
Setup registers [0x0100 to 0x01FF]
Table 16. Setup registers [0x0100 to 0x01FF]
Index
Byte
Register name
Data type Default Type
Comment
0x0100
mode_select
8UI
00
RW
Mode select
0x00 - Software standby
0x01 - Streaming
Refer to Section 3.3: Device operating
modes on page 18
0x0101
image_orientation
8B
00
RW
Image orientation i.e. horizontal mirror
and vertical flip.
Bit 0: 0 - no mirror, 1 - horizontal mirror
enable
Bit 1: 0 - no flip, 1 - vertical flip enable
0x0103
software_reset
8UI
00
RW
Software reset. Setting this register to
1 resets the sensor to its power up
defaults. The value of this bit is also
reset
0x00 - normal
0x01 - soft reset
Refer to Section 3.3: Device operating
modes on page 18
A 2.2ms delay is required after issuing
the software reset command (6MHz
clock)
0x0104
grouped_parameter_hold
8UI
00
RW
The grouped parameter hold register
disables the consumption of
integration, gain and video timing
parameters
0x00 - consume parameters as normal
0x01 - hold parameters
Refer to Section 6.5.3: Integration and
gain parameter re-timing on page 69
0x0105
mask_corrupted_frames
8UI
00
RW
Setting this register to 1 prevents the
sensor out-putting frames that have
been corrupted by video timing
parameter changes.
0x00 - normal
0x01 - mask corrupted frames
0x0110
csi_channel_identifier
8UI
00
RW
The DMA (CCP2) or Virtual (CSI2)
channel identifier.
0x0111
csi_signalling_mode
8UI
02
RW
0x00 - CCP2 Data/clock signalling
0x01 - CCP2 Data/strobe signalling
0x02 - CSI-2
This register should not be changed
while the device is streaming data.



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