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VX6854LC Datasheet(PDF) 42 Page - STMicroelectronics |
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VX6854LC Datasheet(HTML) 42 Page - STMicroelectronics |
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42 / 114 page  Register map VX6854LC 42/114 DocID027110 Rev 2 4.19 Integration time and gain parameter limit registers [0x1000 to 0x10FF] These registers are used to define exposure limits for the integration control registers (0x200 to 0x203). See Section 6.5: Exposure and gain control on page 67 for more information. Table 30. Integration time and gain parameter limit registers [0x1000 to 0x10FF] Index Byte Register name Data type Default Type Comment 0x1000 Hi integration_time_capability 16UI 00.01 RO 0x0001 – coarse and smooth (1 pixel) fine integration. 0x1001 Lo 0x1004 Hi coarse_integration_time_min 16UI 00.00 RO Minimum coarse integration time. Line periods. 0x1005 Lo 0x1006 Hi coarse_integration_time_max _margin 16UI 00.09 RO Current frame length – current max coarse exposure. Line periods. 0x1007 Lo 0x1008 Hi fine_integration_time_min 16UI 01.E5 RO Minimum fine integration time. Pixel periods. 0x1009 Lo 0x100A Hi fine_integration_time_max_ margin 16UI 07.73 RO Current line length – current max fine exposure. Pixel periods. 0x100B Lo 0x1080 Hi digital_gain_capability 16UI 00.01 RO 0x01 – supports digital gain. 0x1081 Lo 0x1084 Hi digital_gain_min 16UR 00.08 RO 1.00000 minimum 0x1085 Lo 0x1086 Hi digital_gain_max 16UR 01.F8 RO 1.96875 maximum 0x1087 Lo 0x1088 Hi digital_gain_step_size 16UR 00.08 RO 0.03125 step size 0x1089 Lo |
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