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VX6854LC Datasheet(PDF) 43 Page - STMicroelectronics

Part # VX6854LC
Description  QXGA EDOF camera module
PDF  114 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VX6854LC Datasheet(HTML) 43 Page - STMicroelectronics

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VX6854LC
Register map
69
4.20
Video timing parameter limit registers [0x1100 to 0x11FF]
For a full description of the video timing parameter limit registers refer to Chapter 6: Video
timing on page 55.
Table 31. Video timing parameter limit registers [0x1100 to 0x11FF]
Index
Byte
Register name
Data type Default Type
Comment
0x1100 Hi
min_ext_clk_freq_mhz
32SF
40.C0
00.00
RO
Minimum external clock frequency
Units: MHz
Value: 6.0
0x1101 3rd
0x1102 2nd
0x1103 Lo
0x1104 Hi
max_ext_clk_freq_mhz
32SF
41.D8
00.00
RO
Maximum external clock frequency
Units: MHz
Value: 27.0
0x1105 3rd
0x1106 2nd
0x1107 Lo
0x1108 Hi
min_pre_pll_clk_div
16UI
00.01
RO
Minimum Pre PLL divider value
Value: 1
0x1109 Lo
0x110A Hi
max_pre_pll_clk_div
16UI
00.04
RO
Maximum Pre PLL divider value
Value: 4
0x110B Lo
0x110C Hi
min_pll_ip_freq_mhz
32SF
40.C0
00.00
RO
Minimum PLL input clock frequency
Units: MHz
Value: 6.0
0x110D 3rd
0x110E 2nd
0x110F Lo
0x1110
Hi
max_pll_ip_freq_mhz
32SF
41.40
00.00
RO
Maximum PLL input clock frequency
Units: MHz
Value: 12.0
0x1111
3rd
0x1112
2nd
0x1113
Lo
0x1114
Hi
min_pll_multiplier
16UI
00.25
RO
Minimum PLL multiplier
Value: 37
0x1115
Lo
0x1116
Hi
max_pll_multiplier
16UI
00.86
RO
Maximum PLL multiplier
Value: 134
0x1117
Lo
0x1118
Hi
min_pll_op_freq_mhz
32SF
43.E1
00.00
RO
Minimum PLL output clock frequency
Units: MHz
Value: 450.0
0x1119
3rd
0x111A 2nd
0x111B Lo



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