Electronic Components Datasheet Search
  English  ▼

X  

VX6854LC Datasheet(PDF) 45 Page - STMicroelectronics

Part # VX6854LC
Description  QXGA EDOF camera module
PDF  114 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VX6854LC Datasheet(HTML) 45 Page - STMicroelectronics

Back Button VX6854LC Datasheet HTML 41Page - STMicroelectronics VX6854LC Datasheet HTML 42Page - STMicroelectronics VX6854LC Datasheet HTML 43Page - STMicroelectronics VX6854LC Datasheet HTML 44Page - STMicroelectronics VX6854LC Datasheet HTML 45Page - STMicroelectronics VX6854LC Datasheet HTML 46Page - STMicroelectronics VX6854LC Datasheet HTML 47Page - STMicroelectronics VX6854LC Datasheet HTML 48Page - STMicroelectronics VX6854LC Datasheet HTML 49Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 45 / 114 page
background image
DocID027110 Rev 2
45/114
VX6854LC
Register map
69
0x1142 Hi
max_frame_length_lines
16UI
FF.FF
RO
Maximum possible number of lines per
Frame.
Value = 65535
Units: Lines
0x1143 Lo
0x1144 Hi
min_line_length_pck
16UI
09.C4
RO
Minimum Line Length allowed.
Value = 2500
Units: Pixel Clocks
0x1145 Lo
0x1146 Hi
max_line_length_pck
16UI
3F.FF
RO
Maximum possible number of pixel
clocks per line.
Value = 16383
Units: Pixel Clocks
0x1147 Lo
0x1148 Hi
min_line_blanking_pck
16UI
01.A8
RO
Minimum line blanking time in pixel
clocks
Value = 424
Units: Pixel Clocks
0x1149 Lo
0x114A Hi
min_frame_blanking_lines
16UI
00.24
RO
Minimum frame blanking in video lines
= 36
0x114B Lo
0x1160 Hi
min_op_sys_clk_div
16UI
00.01
RO
Minimum output system clock divider.
Value = 1
0x1161 Lo
0x1162 Hi
max_op_sys_clk_div
16UI
00.42
RO
Maximum output system clock divider
Value = 66
0x1163 Lo
0x1164 Hi
min_op_sys_clk_freq_mhz
32SF
40.F2
6C.9B
RO
Minimum output system clock
frequency
Units: MHz
Value: 7.57
Note that this value is 80MHz in CSI2
mode.
0x1165
0x1166
0x1167 Lo
0x1168 Hi
max_op_sys_clk_freq_mhz
32SF
44.48
00.00
RO
Maximum output system clock
frequency
Units: MHz
Value: 800.0
0x1169
0x116A
0x116B Lo
0x116C Hi
min_op_pix_clk_div
16UI
00.08
RO
Minimum output pixel clock divider.
Value = 8
0x116D Lo
0x116E Hi
max_op_pix_clk_div
16UI
00.0A
RO
Maximum output pixel clock divider
Value = 10
0x116F Lo
0x1170 Hi
min_op_pix_clk_freq_mhz
32SF
3F.41
F0.7C
RO
Minimum output pixel clock frequency
Units: MHz
Value: 0.757 (757 kHz)
0x1171
0x1172
0x1173 Lo
Table 31. Video timing parameter limit registers [0x1100 to 0x11FF] (continued)
Index
Byte
Register name
Data type Default Type
Comment



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com