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MPD784036 Datasheet(PDF) 33 Page - NEC |
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MPD784036 Datasheet(HTML) 33 Page - NEC |
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33 / 90 page ![]() µPD784031 33 8.5 PWM Output (PWM0, PWM1) Two channels of PWM (pulse width modulation) output circuitry with a resolution of 12 bits and a repetition frequency of 62.5 kHz (fCLK = 16 MHz) are incorporated. Low or high active level can be selected for the PWM output channels, independently of each other. This output is best suited to DC motor speed control. Figure 8-6. Block Diagram of PWM Output Unit Internal bus PWM modulo register PWM control register (PWMC) Reload control Prescaler 8-bit down-counter Pulse control circuit 4-bit counter Output control PWMn (output pin) 1/256 fCLK 84 16 8 PWMn 15 0 8 7 4 3 Remark n = 0, 1 |
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