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MPD784036 Datasheet(PDF) 67 Page - NEC

Part # MPD784036
Description  16/8-BIT SINGLE-CHIP MICROCONTROLLER
PDF  90 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

MPD784036 Datasheet(HTML) 67 Page - NEC

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µPD784031
67
Parameter
Serial clock cycle time
(SCK1, SCK2)
Serial clock low-level width
(SCK1, SCK2)
Serial clock high-level width
(SCK1, SCK2)
Setup time for SI1 and SI2
(to SCK1, SCK2
↑)
Hold time for SI1 and SI2
(to SCK1, SCK2
↑)
Output delay time for SO1 and
SO2 (to SCK1, SCK2
↓)
Output hold time for SO1 and
SO2 (to SCK1, SCK2
↑)
(2) IOE1, IOE2
Remarks 1. The values in this table are those when CL is 100 pF.
2. T: Serial clock cycle set by software. The minimum value is 16/fXX.
(3) UART, UART2
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MIN.
250
500
T
85
210
0.5T - 40
85
210
0.5T - 40
40
40
0
0.5tCYSK1 - 40
MAX.
50
Symbol
tCYSK1
tWSKL1
tWSKH1
tSSSK1
tHSSK1
tDSOSK
tHSOSK
Conditions
Input
VDD = +5.0 V
± 10 %
Output
Internal, divided by 16
Input
VDD = +5.0 V
± 10 %
Output
Internal, divided by 16
Input
VDD = +5.0 V
± 10 %
Output
Internal, divided by 16
When data is transferred
Unit
ns
ns
ns
ns
ns
ns
Parameter
ASCK clock input cycle time
ASCK clock low-level width
ASCK clock high-level width
Symbol
tCYASK
tWASKL
tWASKH
MIN.
125
250
52.5
85
52.5
85
MAX.
Conditions
VDD = +5.0 V
± 10 %
VDD = +5.0 V
± 10 %
VDD = +5.0 V
± 10 %



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