MPD784036 datasheet(64/90 Pages) NEC

64 / 90 page

µPD784031

(1) Read/write operation (2/2)

Note

The hold time includes the time during which VOH1 and VOL1 are held under the load conditions of

CL = 50 pF and RL = 4.7 k

Ω.

Remarks T:

TCYK (system clock cycle time)

Number of wait states (n

≥ 0)

(2) Bus hold timing

Remarks T:

TCYK (system clock cycle time)

1 (during address wait), otherwise, 0

Number of wait states (n

≥ 0)

Unit

Parameter

Data setup time (to WR

↑)

Data hold time (to WR

↑)Note

Delay from WR

↑ to ASTB↑

WR low-level width

Symbol

tSODW

tHWOD

tDWST

tWWL

MIN.

(1.5 + n) T - 30

(1.5 + n) T - 40

0.5T - 5

0.5T - 25

0.5T - 12

(1.5 + n) T - 30

(1.5 + n) T - 40

MAX.

Conditions

VDD = +5.0 V

± 10 %

VDD = +5.0 V

± 10 %

VDD = +5.0 V

± 10 %

Unit

Parameter

Delay from HLDRQ

↑ to float

Delay from HLDRQ

↑ to HLDAK↑

Delay from float to HLDAK

↑

Delay from HLDRQ

↓ to HLDAK↓

Delay from HLDAK

↓ to active

MIN.

1T - 20

1T - 30

MAX.

(6 + a + n) T + 50

(7 + a + n) T + 30

(7 + a + n) T + 40

1T + 30

2T + 40

2T + 60

Conditions

VDD = +5.0 V

± 10 %

VDD = +5.0 V

± 10 %

VDD = +5.0 V

± 10 %

Symbol

tFHQC

tDHQHHAH

tDCFHA

tDHQLHAL

tDHAC

MPD784036 Datasheet(PDF) 64 Page - NEC

MPD784036 Datasheet(HTML) 64 Page - NEC

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