TSC2102IDA datasheet(26/54 Pages) TI

26 / 54 page

TSC2102

SLAS379A− APRIL 2003 − REVISED JUNE 2004

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DAC Digital Volume Control

The DAC has a digital volume control block, which implements a programmable gain. The volume level can be varied from

0dB to –63.5 dB in 0.5 dB steps, in addition to a mute bit, independently for each channel. The volume level of both channels

can also be changed simultaneously by the master volume control. The gain is implemented with a soft-stepping algorithm,

which only changes the actual volume by one step per input sample, either up or down, until the desired volume is reached.

The rate of soft-stepping can be slowed to one step per two input samples through D1 of control register 04H/Page2.

Because of soft-stepping, the host does not know when the DAC has actually been muted. This may be important if the

host wishes to mute the DAC before making a significant change, such as changing sample rates. In order to help with this

situation, the part provides a flag back to the host via a read-only register bit (D2−D3 of control register 04H/Page2) that

alerts the host when the part has completed the soft-stepping and the actual volume has reached the desired volume level.

The TSC2102 also includes functionality to detect when the user switches on or off the de-emphasis or bass-boost

functions, then first (1) soft-mute the DAC volume control, (2) change the operation of the digital effects processing, and

(3) soft-unmute the TSC2102. This avoids any possible pop/clicks in the audio output due to instantaneous changes in the

filtering. A similar algorithm is used when first powering up or down the DAC. The circuit begins operation at power up with

the volume control muted, then soft-steps it up to the desired volume level. At power down, the logic first soft-steps the

volume down to a mute level, then powers down the circuitry.

Headphone Driver

The TSC2102 features a stereo headphone driver that can deliver 25 mW per channel at 3.3-V supply, into 16-

Ω load. The

headphones can be connected in a single-ended configuration using ac-coupling capacitors, or the capacitors can be

removed and virtual ground (VGND) connection powered. These two configurations are shown in Figure 22. If the

headphone amplifiers are not needed, such as when the external audio amplifier is used, then the headphone drivers can

be bypassed to save power using register programming. When bypassed, the HPR and HPL outputs act as line level

outputs capable of driving a load of 10 k

Ω minimum.

HPR

HPL

VGND

HPR

HPL

VIRTUAL−GROUND

SPEAKER CONNECTION

SINGLE−ENDED

SPEAKER CONNECTION

Figure 22. Connection Diagram for DAC Outputs

TSC2102IDA Datasheet(PDF) 26 Page - Texas Instruments