TSC2102IDA datasheet(33/54 Pages) TI

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TSC2102

SLAS379A− APRIL 2003 − REVISED JUNE 2004

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BIT

FUNCTION

RESET VALUE

READ/

WRITE

NAME

D3−D1

PVSTC

R/W

000

Panel Voltage Stabilization Time Control. These bits allow you to specify a delay time from

the time the touch screen drivers are enabled to the time the voltage is sampled and a

conversion is started. This allows the user to adjust for the settling of the individual touch

panel and external capacitances.

000 => 0-

µs stabilization time

001 => 100-

µs stabilization time

010 => 500-

µs stabilization time

011 => 1-ms stabilization time

100 => 5-ms stabilization time

101 => 10-ms stabilization time

110 => 50-ms stabilization time

111 => 100-ms stabilization time

AVGFS

R/W

Average Filter select

0 => Mean filter

1 => Median filter

BIT

NAME

READ/

WRITE

RESET

VALUE

FUNCTION

D15−D14

PINTDAV

R/W

Pen Interrupt or Data Available. These two bits program the function of the PINTDAV pin.

00 => Acts as PEN interrupt (active low) only. When PEN touch is detected, PINTDAV goes low.

01 => Acts as data available (active low) only. The PINTDAV goes low as soon as one set of ADC

conversion(s) is completed. For scan mode, PINTDAV remains low as long as all the

appropriate registers have not been read out.

10 => Acts as both PEN interrupt and data available. When PEN touch is detected, PINTDAV goes

low. PINTDAV goes high once all the selected conversions are over.

11 => Same as 10

Note: See the section Conversion Time Calculation for the TSC2102 in this data sheet for timing

diagrams and conversion time calculations.

D13

PWRDN

TSC−ADC Power down status

0 => TSC−ADC is active

1 => TSC−ADC stops conversion and powers down

D12

HCTLM

Host Controlled Mode Status

0 => Host controlled mode

1 => Self (TSC2102) controlled mode

D11

DAVAIL

Data Available Status

0 => No data available.

1 => Data is available(i.e one set of conversion is done)

Note:− This bit gets cleared only after all the converted data have been completely read out.

D10

XSTAT

X Data Register Status

0 => No new data is available in X−data register

1 => New data for X−coordinate is available in register

Note: This bit gets cleared only after the converted data of X coordinate has been completely read

out of the register.

YSTAT

Y Data Register Status

0 => No new data is available in Y−data register

1 => New data for Y−coordinate is available in register

Note: This bit gets cleared only after the converted data of Y coordinate has been completely read

out of the register.

Z1STAT

Z1 Data Register Status

0 => No new data is available in Z1−data register

1 => New data is available in Z1−data register

Note: This bit gets cleared only after the converted data of Z1 coordinate has been completely read

out of the register.

TSC2102IDA Datasheet(PDF) 33 Page - Texas Instruments

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