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DSD1791 Datasheet(PDF) 39 Page - Texas Instruments |
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DSD1791 Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 56 page ![]() DSD1791 SLES072B − MARCH 2003 − REVISED NOVEMBER 2006 www.ti.com 39 DSD MODE CONFIGURATION AND FUNCTION CONTROLS Configuration for the DSD Interface Mode DSD = 1 (Register 20, B5) B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 Register 16 R/W 0 0 1 0 0 0 0 – – – – – – – – Register 17 R/W 0 0 1 0 0 0 1 – – – – – – – – Register 18 R/W 0 0 1 0 0 1 0 – – – – DMF1 DMF0 – – Register 19 R/W 0 0 1 0 0 1 1 REV – – OPE MDOE – – – Register 20 R/W 0 0 1 0 1 0 0 – SRST 1 – MONO CHSL OS1 OS0 Register 21 R 0 0 1 0 1 0 1 – – – – – DZ1 DZ0 – Register 22 R 0 0 1 0 1 1 0 – – – – – – ZFGR ZFGL NOTE: –: Function is disabled. No operation even if data bit is set DMF[1:0]: Analog FIR Performance Selection Default value: 00 DMF[1:0] Analog FIR Performance Select 00 FIR-1 (default) 01 FIR-2 10 FIR-3 11 FIR-4 Plots for the four analog FIR filter responses are shown in the ANALOG FIR FILTER PERFORMANCE IN DSD MODE section of this data sheet. OS[1:0]: Analog FIR Operation Speed Selection Default value: 00 OS[1:0] Operation Speed Select 00 fDBCK (default) 01 fDBCK/2 10 Reserved 11 fDBCK/4 The OS bits in the DSD mode select the operating rate of the analog FIR. The OS bits must be set before setting the DSD bit to 1. |
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