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TPS53317RGBR Datasheet(PDF) 16 Page - Texas Instruments

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Part # TPS53317RGBR
Description  6-A Output, D-CAP Mode, Synchronous Step-Down, Integrated-FET Converter for DDR Memory Termination
PDF  35 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS53317RGBR Datasheet(HTML) 16 Page - Texas Instruments

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background image
+
VSLEW
+
±
RC
+
PWM
Comparator
RDS(on)
gMV = 1 mS
Driver
LOUT
ESR
COUT
ROUT
RLOAD
8 k:
+
±
+
gMC= 1 mS
CC
VREF
CP
VIN
VOUT
VREF
COMP
SW
TPS53317
SLUSAK4D – JUNE 2011 – REVISED JULY 2015
www.ti.com
Feature Description (continued)
7.3.5.5.2
Negative OCL
The negative OCL circuit acts when the converter is sinking current from the output capacitor(s). The converter
continues to act in a valley mode, the typical value of the negative OCL set point is –9.3 A or –6.5 A (depending
on mode selection).
7.3.6 Thermal Protection
The TPS53317 device has an internal temperature sensor. When the temperature reaches a nominal 145°C, the
device shuts down until the temperature decreases by approximately 10°C, when the converter restarts.
7.4 Device Functional Modes
7.4.1 Non-Droop Configuration
The TPS53317 device can be configured as a non-droop solution. The benefit of a non-droop approach is that
load regulation is flat, therefore, in a system where tight DC tolerance is desired, the non-droop approach is
recommended. For the Intel system agent application, non-droop is recommended as the standard configuration.
The non-droop approach can be implemented by connecting a resistor and a capacitor between the COMP and
the VREF pins. The purpose of the type II compensation is to obtain high DC feedback gain while minimizing the
phase delay at unity gain cross over frequency of the converter.
The value of the resistor (RC) can be calculated using the desired unity gain bandwidth of the converter, and the
value of the capacitor (CC) can be calculated by knowing where the zero location is desired. The capacitor CP is
optional, but recommended. Its appropriate capacitance value can be calculated using the desired pole location.
Figure 22 shows the basic implementation of the non-droop mode using the device
Figure 22. Non-Droop Mode Basic Implementation
16
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Product Folder Links: TPS53317



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