TPS53317RGBR datasheet(18/35 Pages) TI1

Part #	TPS53317RGBR

Description	6-A Output, D-CAP Mode, Synchronous Step-Down, Integrated-FET Converter for DDR Memory Termination

PDF	35 Pages

Scroll/Zoom	100%

Manufacturer	TI1 [Texas Instruments]

Direct Link	http://www.ti.com

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18 / 35 page

Droop

IOUT

VOUT setpoint at 0 A

Maximum undershoot voltage =(5%±1%) x 1 = 4% x VOUT

Load insertion

Load release

Non-

Droop

Maximum transient voltage

= (5%±1%) x 2 = 8% x VOUT

VOUT setpoint at 6 A

VOUT setpoint at 0 A

Maximum overshoot voltage =(5%±1%) x 1 = 4% x VOUT

VSLEW

RDROOP

PWM

Comparator

RDS(on)

gMV = 1 mS

Driver

LOUT

ESR

COUT

ROUT

RLOAD

8 k:

gMC= 1 mS

VREF

VIN

VOUT

VREF

COMP

TPS53317

SLUSAK4D – JUNE 2011 – REVISED JULY 2015

www.ti.com

Device Functional Modes (continued)

Figure 25 shows the basic implementation of the droop mode using the TPS53317 device.

Figure 25. DROOP Mode Basic Implementation

The droop (voltage positioning) method was originally recommended to reduce the number of external output

capacitors required. The effective transient voltage range is increased because of the active voltage positioning

(see Figure 26).

Figure 26. DROOP vs Non-DROOP in Transient Voltage Window

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