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TPS53317RGBR Datasheet(PDF) 11 Page - Texas Instruments

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Part # TPS53317RGBR
Description  6-A Output, D-CAP Mode, Synchronous Step-Down, Integrated-FET Converter for DDR Memory Termination
PDF  35 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS53317RGBR Datasheet(HTML) 11 Page - Texas Instruments

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1
11
PGND
SW
TPS53317
OC
ZC
XCON
16 BST
20 V5IN
PWM
10
19 PGOOD
Control Logic
UDG-11106
+
+
VREFIN +20%
+
+
VOUT
+
tON
One-
Shot
UV
OV
VREFIN ±32%
+
8 R
8
COMP
R
6
GND
7
VREF
On-Time
Selection
15 2A
18 MODE
+
+
Discharge
UVP
OVP
Current
Sense
+
VS
Amplifier
Current Sense
Amplifier
SW
PGND
4
5
VIN
VIN
12 SW
13 SW
14 SW
15 SW
2
PGND
3
PGND
17
EN
Delay
N
On/Off Time
N
Minimum On/Off
N
SKIP/FPWM
N
OCL/OVP/UVP
N
Discharge
+
9
REFIN
SS
DAC
Ramp
Comp
Internal Voltage
Reference
ZC Threshold
Modulation
PGND
GND
GND
DRVH
DRVL
VREFIN ± 16%
VREFIN + 16%
Pad
TPS53317
www.ti.com
SLUSAK4D – JUNE 2011 – REVISED JULY 2015
7 Detailed Description
7.1 Overview
The TPS53317 device is a D-CAP+™ mode adaptive on-time converter. Integrated high-side and low-side FETs
support a maximum of 6-A DC output current. The converter automatically operates in discontinuous conduction
mode (DCM) to optimize light-load efficiency. Multiple switching frequencies are provided to enable optimization
of the power train for the cost, size and efficiency requirements of the design (see Table 1).
In adaptive on-time converters, the controller varies the on-time as a function of input and output voltage to
maintain a nearly constant frequency during steady-state conditions. In conventional constant on-time converters,
each cycle begins when the output voltage crosses to a fixed reference level. However, in the TPS53317 device,
the cycle begins when the current feedback reaches an error voltage level which is the amplified difference
between the reference voltage and the feedback voltage.
7.2 Functional Block Diagram
Copyright © 2011–2015, Texas Instruments Incorporated
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11
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