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TPS53317RGBR Datasheet(PDF) 13 Page - Texas Instruments

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Part # TPS53317RGBR
Description  6-A Output, D-CAP Mode, Synchronous Step-Down, Integrated-FET Converter for DDR Memory Termination
PDF  35 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS53317RGBR Datasheet(HTML) 13 Page - Texas Instruments

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background image
Power good window,
reference to REFIN
EN AND
V5IN
VREF
PGOOD
VOUT
Fixed
1.6 ms
soft-start
PGOOD
Delay
1.0 ms
+8%
±8%
Internal soft-start delay time
260 µs typical
400 µs typical
±5%
+16%
±16%
REFIN
Tme
R1
VREF
REFIN
7
9
R2
TPS53317
OUT
REF
R2
V
V
R1
R2
=
´
+
TPS53317
www.ti.com
SLUSAK4D – JUNE 2011 – REVISED JULY 2015
Feature Description (continued)
7.3.4 Power Sequences
7.3.4.1 Non-Tracking Startup
The TPS53317 device can be configured for non-tracking application. When non-tracking is configured, output
voltage is regulated to the REFIN voltage which taps off the voltage dividers from the 2-V reference voltage.
Either the EN pin or the V5IN pin can be used to start up the device. The device uses internal voltage servo DAC
to provide a 1.6-ms soft-start time during soft-start initialization. (See Figure 18.)
In a non-tracking application, the output voltage is determined by the resistive divider between the VREF pin and
the REFIN pin.
(2)
.
.
Figure 17. Non-Tracking Configuration
Figure 18. Non-Tracking Startup Timing
Copyright © 2011–2015, Texas Instruments Incorporated
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