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TPS53317RGBR Datasheet(PDF) 12 Page - Texas Instruments

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Part # TPS53317RGBR
Description  6-A Output, D-CAP Mode, Synchronous Step-Down, Integrated-FET Converter for DDR Memory Termination
PDF  35 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS53317RGBR Datasheet(HTML) 12 Page - Texas Instruments

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=
´
OUT
ON
IN
SW
V
1
t
V
f
Time (ms)
Current
Feedback
t
ON
t
V
CS
V
COMP
UDG-10187
V
REF
TPS53317
SLUSAK4D – JUNE 2011 – REVISED JULY 2015
www.ti.com
7.3 Feature Description
7.3.1 PWM Operation
Referring to Figure 16, in steady state, continuous conduction mode, the converter operates in the following way.
Starting with the condition that the top FET is off and the bottom FET is on, the current feedback (VCS) is higher
than the error amplifier output (VCOMP). VCS falls until it hits VCOMP, which contains a component of the output
ripple voltage. VCS is not directly accessible by measuring signals on pins of TPS53317 device. The PWM
comparator senses where the two waveforms cross and triggers the on-time generator.
Figure 16. D-CAP+™ Mode Basic Waveforms
The current feedback is an amplified and filtered version of the voltage between PGND and SW during low-side
FET on-time. The device also provides a single-ended differential voltage (VOUT) feedback to increase the system
accuracy and reduce the dependence of circuit performance on layout.
7.3.2 PWM Frequency and Adaptive On-Time Control
In general, the on-time (at the SW node) can be estimated by Equation 1.
where
•
fSW is the frequency selected by the connection of the MODE pin
(1)
The on-time pulse is sent to the top FET. The inductor current and the current feedback rises to peak value.
Each ON pulse is latched to prevent double pulsing. Switching frequency settings are shown in Table 1.
7.3.3 Light-Load Power Saving Features
The TPS53317 device has an automatic pulse-skipping mode to provide excellent efficiency over a wide load
range. The converter senses inductor current and prevents negative flow by shutting off the low-side gate driver.
This saves power by eliminating re-circulation of the inductor current. Further, when the bottom FET shuts off,
the converter enters discontinuous mode, and the switching frequency decreases, thus reducing switching losses
as well.
The device also provides a special light-load power saving feature, called ripple reduction. Essentially, it reduces
the on-time in SKIP mode to effectively reduce the output voltage ripple associated with using an all MLCC
capacitor output power stage design.
12
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Product Folder Links: TPS53317



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