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TPS53317RGBR Datasheet(PDF) 17 Page - Texas Instruments |
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TPS53317RGBR Datasheet(HTML) 17 Page - Texas Instruments |
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17 / 35 page ![]() = = \ = ´ ´ DROOP CSINT CSINT LOAD _ LINE DROOP OUT DROOP M LOAD _ LINE M V A A R R I R g R g ´ = ´ CSINT OUT DROOP DROOP M A I V R g 0.65 0.67 0.69 0.71 0.73 0.75 0.77 0.79 0.81 0.83 0.85 1 2 3 4 5 6 Output Current (A) Non−Droop Configuration TPS53317 www.ti.com SLUSAK4D – JUNE 2011 – REVISED JULY 2015 Device Functional Modes (continued) Figure 23 shows shows the load regulation using non-droop configuration. Figure 24 shows the transient response of the device using non-droop configuration, where COUT = 3 x 47 µF. The applied step load is from 0 A to 2 A. VIN = 1.5 V VOUT = 0.75 V CH 2: VOUT CH 4: IOUT CH 3: SW (20 mV/div) (1 A/div) (1 V/div) Figure 24. Non-Droop Configuration Transient Response Figure 23. Load Regulation (Non-Droop Configuration) 7.4.2 Droop Configuration The terminology for droop is the same as load line or voltage positioning as defined in the Intel CPU VCORE specification. Based on the actual tolerance requirement of the application, load-line set points can be defined to maximize either cost savings (by reducing output capacitors) or power reduction benefits. Accurate droop voltage response is provided by the finite gain of the droop amplifier. The equation for droop voltage is shown in Equation 5. where • low-side on-resistance is used as the current sensing element • ACSINT is a constant, which nominally is 53 mV/A. • IOUT is the DC current of the inductor, or the load current • RDROOP is the value of resistor from the COMP pin to the VREF pin • gM is the transconductance of the droop amplifier with nominal value of 1 mS (5) Equation 6 can be used to easily derive RDROOP for any load line slope/droop design target. (6) Copyright © 2011–2015, Texas Instruments Incorporated Submit Documentation Feedback 17 Product Folder Links: TPS53317 |
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