Electronic Components Datasheet Search
  English  ▼

X  

TPS53317RGBR Datasheet(PDF) 26 Page - Texas Instruments

Click here to check the latest version.
Part # TPS53317RGBR
Description  6-A Output, D-CAP Mode, Synchronous Step-Down, Integrated-FET Converter for DDR Memory Termination
PDF  35 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS53317RGBR Datasheet(HTML) 26 Page - Texas Instruments

Back Button TPS53317RGBR Datasheet HTML 22Page - Texas Instruments TPS53317RGBR Datasheet HTML 23Page - Texas Instruments TPS53317RGBR Datasheet HTML 24Page - Texas Instruments TPS53317RGBR Datasheet HTML 25Page - Texas Instruments TPS53317RGBR Datasheet HTML 26Page - Texas Instruments TPS53317RGBR Datasheet HTML 27Page - Texas Instruments TPS53317RGBR Datasheet HTML 28Page - Texas Instruments TPS53317RGBR Datasheet HTML 29Page - Texas Instruments TPS53317RGBR Datasheet HTML 30Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 26 / 35 page
background image
SW
PGND
Thermal Pad
PGND
PGND
VIN
VIN
SW
SW
SW
SW
VOUT
VIN
PGND
VIN
PGND
TPS53317
SLUSAK4D – JUNE 2011 – REVISED JULY 2015
www.ti.com
9 Power Supply Recommendations
This device operates from an input voltage supply between 1 V and 6 V. This device requires a separate 5-V
power supply for analog circuits and gate drive. Use the proper bypass capacitors for both the input supply and
the 5-V supply in order to filter noise and to ensure proper device operation.
10 Layout
10.1 Layout Guidelines
Stable power supply operation depends on proper layout. Follow these guidelines for an optimized PCB layout.
•
Connect PGND pins to the thermal pad underneath the device. Use four vias to connect the thermal pad to
internal ground planes.
•
Place VIN, V5IN and VREF decoupling capacitors as close to the device as possible.
•
Use wide traces for the VIN, PGND and SW pins. These nodes carry high current and also serve as heat
sinks.
•
Place feedback and compensation components as close to the device as possible.
•
Place COMP and VOUT analog signal traces away from noisy signals (SW, BST).
•
The GND pin should connect to the PGND in only one place, through a via or a 0-
Ω resistor.
10.2 Layout Example
Figure 41. TPS53317 Board Layout
26
Submit Documentation Feedback
Copyright © 2011–2015, Texas Instruments Incorporated
Product Folder Links: TPS53317



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com