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GC5016 Datasheet(PDF) 4 Page - Texas Instruments

Part # GC5016
Description  WIDEBAND QUAD DIGITAL DOWN CONVERTER/ UP CONVERTER
PDF  88 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

GC5016 Datasheet(HTML) 4 Page - Texas Instruments

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GC5016
SLWS142G − JANUARY 2003 − REVISED NOVEMBER 2005
www.ti.com
4
7 AC CHARACTERISTICS
−40
°C to 85°C case, supplies across recommended range unless otherwise noted
PARAMETER
MIN
MAX
UNITS
fCK
Clock frequency (1)
(3)
160
MHz
tCKL
Clock low period (below VIL) (1)
2
ns
tCKH
Clock high period (above VIH) (1)
2
ns
tr, tf
Clock rise and fall times (VIL to VIH) (4)
2
ns
tsu
Input set up before CK goes high (AI, BI, CI, DI, SIA, or SIB) (1)
2
ns
th
Input hold time after CK goes high (1)
0.5
ns
td
Data output delay from rising edge of CK. (AO, BO, CO, DO, IFLG, [A−D]FS, [A−D]CK, or SO) (1)
5
ns
th(o)
Data output hold from rising edge of CK (1)
1
ns
fJCK
JTAG clock frequency (1)
40
MHz
tJCKL
JTAG clock low period (below VIL) (1)
10
ns
tJCKH
JTAG clock high period (above VIH) (1)
10
ns
tsu(J)
JTAG input (TDI or TMS) set up before TCK goes high (1)
1
ns
th(J)
JTAG input (TDI or TMS) hold time after TCK goes high (1)
10
ns
td(J)
JTAG output (TDO) delay from falling edge of TCK (1)
10
ns
tsu(C)
Control setup during reads or writes. (1)(5)
2
ns
tsu(EWC)
Control data setup during writes (normal mode). (1)(5)
4
ns
th(C)
Control hold during writes. (1)(5)
1
ns
tCSPW
Control strobe (CE and WR low) pulse width (write operation). (1)(5)
20
ns
td(C)
Control output delay CE and RD low and A stable to C (read operation). (1)(5)
12
ns
tREC
Control recovery time between reads or writes. (1)(5)
20
ns
t(CZ)
End of read to HI-Z (2)(5)
5
ns
IC(DYN)
Core dynamic supply current nominal voltages, 100 MHz, four channels active, full length filters,
high temperature. (6)
420
mA
(1) Each part is tested with a 100°C case temperature for the given specification. Lots are sample tested at −40°C.
(2) Controlled by design and process and not directly tested.
(3) The minimum clock rate is calculated in the cmd5016 configuration program. It may be estimated by (1 + ncic − nfir) x 200 kHz.
(4) Recommended practice
(5) See Figure 27 through Figure 32.
(6) Each port is tested with a 100°C case temperature for the given specification.
General: Timing is measured from CK at VPAD/2 to input or output at VPAD/2. Output loading is a 50-
Ω transmission line whose delay is calibrated
out.
8 THERMAL CHARACTERISTICS
THERMAL CONDUCTIVITY
252 BGA
UNITS
THERMAL CONDUCTIVITY
1 W
UNITS
Theta junction to ambient,
θJA
22
°C/W
Theta junction to case,
θJC
5
°C/W
NOTE: Air flow reduces θJA and is highly recommended.



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