PM5347 datasheet(186/302 Pages) PMC

186 / 302 page

PM5347 S/UNI-PLUS

DATA SHEET

PMC-941033

ISSUE 6

SATURN USER NETWORK INTERFACE PLUS

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

170

and contains only four words. Refer to the Drop Side Receive Interface timing

diagrams in the Functional Timing section.

LCDDROP:

The LCD drop bit, LCDDROP, enables the dropping of cells while in the loss

of cell delineation state. When LCDDROP is set to logic one, received cells

are not written into the FIFO until the LCD indication is deasserted, which

occurs after being continuously in the SYNC state for 4 ms. If LCDDROP is

set to logic zero, cells are written to the FIFO when in the SYNC state,

regardless of the LCD state.

FIFOE:

The FIFOE bit is the interrupt enable for FIFO overruns. When FIFOE is a

logic one, an interrupt is generated when the FIFO overruns.

HCSE:

The HCSE bit is the interrupt enable for HCS errors. When HCSE is a logic

one, an interrupt is generated when an HCS error is detected.

LCDE:

The LCDE bit is the interrupt enable for loss of cell delineation. When LCDE

is a logic one, an interrupt is generated when the LCD state changes.

OCDE:

The OCDE bit is the interrupt enable for out of cell delineation. When OCDE

is a logic one, an interrupt is generated when the OCD state changes.

PM5347 Datasheet(PDF) 186 Page - PMC-Sierra, Inc