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PM5347 Datasheet(PDF) 185 Page - PMC-Sierra, Inc |
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PM5347 Datasheet(HTML) 185 Page - PMC-Sierra, Inc |
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185 / 302 page ![]() PM5347 S/UNI-PLUS DATA SHEET PMC-941033 ISSUE 6 SATURN USER NETWORK INTERFACE PLUS PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 169 Register 0x52: RACP Interrupt Enable/Control Bit Type Function Default Bit 7 R/W OCDE 0 Bit 6 R/W LCDE 0 Bit 5 R/W HCSE 0 Bit 4 R/W FIFOE 0 Bit 3 R/W LCDDROP 0 Bit 2 R/W RCALEVEL0 1 Bit 1 R/W HCSFTR[1] 0 Bit 0 R/W HCSFTR[0] 0 HCSFTR[1:0]: The HCS filter bits, HCSFTR[1:0], indicate the number of error free cells required while in detection mode before reverting back to correction mode. Please refer to Figure 6 for details. Table 2 - HCSFTR[1:0] Cell Acceptance Threshold 00 One ATM cell with correct HCS before resumption of cell correction. 01 Two ATM cells with correct HCS before resumption of cell correction. 10 Four ATM cells with correct HCS before resumption of cell correction. 11 Eight ATM cells with correct HCS before resumption of cell correction. RCALEVEL0: The RCALEVEL0 bit controls the function of the RCA output. When RCALEVEL0 is a logic one, a high to low transition on output RCA indicates that the receive FIFO is empty. When RCALEVEL0 is a logic zero, a high to low transition on output RCA indicates that the receive FIFO is almost empty |
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