PM5347 datasheet(198/302 Pages) PMC

198 / 302 page

PM5347 S/UNI-PLUS

DATA SHEET

PMC-941033

ISSUE 6

SATURN USER NETWORK INTERFACE PLUS

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

182

HCSB:

The HCSB bit enables the internal generation and insertion of the HCS octet

into the transmit cell stream. When HCSB is a logic zero, the HCS is

generated and inserted internally. When HCSB is a logic one, the HCS octet

read from the FIFO is inserted unaltered into the transmit cell stream. An

HCS is generated for idle/unassigned cells regardless of the state of this bit.

DHCS:

The DHCS bit controls the insertion of HCS errors for diagnostic purposes.

When DHCS is a logic one, the HCS octet is inverted prior to insertion in the

transmit stream. DHCS takes effect unconditionally regardless of whether an

idle/unassigned cell is being transmitted or whether the HCS octet has been

read from the FIFO.

FOVRI:

The FOVRI bit is the transmit FIFO overrun interrupt status bit. FOVRI is a

logic one when a FIFO overrun occurs. This bit is cleared when this register

is read.

TSOCI:

The TSOCI bit is a logic one when the TSOC input is sampled high during

any position other than the first word of the cell data structure. The write

address counter is reset to the first word of the data structure when TSOC is

sampled high. This bit is cleared when this register is read.

FIFOE:

The FIFOE bit enables the generation of an interrupt due to a FIFO overrun

error condition, or when the TSOC input is sampled high during any position

other than the first word of the cell data structure. When FIFOE is a logic

one, the interrupt is enabled.

PM5347 Datasheet(PDF) 198 Page - PMC-Sierra, Inc