LAN89218 datasheet(27/148 Pages) MICROCHIP

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DS60001255B-page 27

LAN89218

the RX status word for the associated frame will indicate that the frame size has increased by two bytes to

accommodate the checksum.

Setting the RXCOE_EN bit in the COE_CR—Checksum Offload Engine Control Register enables the RXCOE, and

the RXCOE_MODE bit selects the operating mode. When the RXCOE is disabled, the received frame and associated

status must not be modified and received data is simply passed through the RXCOE.

3.6.1.1

RX Checksum Calculation

The checksum is calculated 16 bits at a time. In the case of an odd sized frame, an extra byte of zero is used to

pad up to 16 bits.

Consider the following packet: DA, SA, Type, B0, B1, B2 … BN, FCS

Let [A, B] = A*256 + B;

If the packet has an even number of octets then

checksum = [B1, B0] + C0 + [B3, B2] + C1 + … + [BN, BN-1] + CN-1

Where C0, C1, ... CN-1 are the carry out results of the intermediate sums.

If the packet has an odd number of octets then

checksum = [B1, B0] + C0 + [B3, B2] + C1 + … + [0, BN] + CN-1

3.6.2

TRANSMIT CHECKSUM OFFLOAD ENGINE (TXCOE)

The transmit checksum offload engine provides assistance to the CPU by calculating a 16-bit checksum, typically for

TCP, for a transmit Ethernet frame. The TXCOE calculates the checksum and inserts the results back into the data

stream as it is transferred to the MAC.

To activate the TXCOE and perform a checksum calculation, the host must first set the TX checksum offload engine

enable bit (TXCOE_EN) in the COE_CR—Checksum Offload Engine Control Register. The host then pre-pends a 3

DWORD buffer to the data that will be transmitted. The pre-pended buffer includes a TX Command ‘A’, TX Command

‘B’, and a 32-bit TX checksum preamble. When bit 14 (CK) of the TX Command ‘B’ is set in conjunction with bit 13

(FS) of TX Command ‘A’ and bit 16 (TXCOE_EN) of the COE_CR register, the TXCOE will perform a checksum

calculation on the associated packet. When these three bits are set, a 32-bit TX checksum preamble must be pre-

pended to the beginning of the TX packet (refer to Table 3-7). The TX checksum preamble instructs the TXCOE on

the handling of the associated packet. Bits 11:0 of the TX checksum preamble define the byte offset at which the

data checksum calculation will begin (TXCSSP). The checksum calculation will begin at this offset and will continue

until the end of the packet. When the calculation is complete, the checksum will be inserted into the packet at the

byte offset defined by bits 27:16 of the TX checksum preamble (TXCSLOC). If the CK bit is not set in the first TX

Command ‘B’ of a packet, the packet is passed directly through the TXCOE without modification, regardless if the

TXCOE_EN is set.

Note:

When enabled, the RXCOE calculates a checksum for every received frame.

Note:

Software applications must stop the receiver and flush the RX data path before changing the state of the

RXCOE_EN or RXCOE_MODE bits.

Note:

When the RXCOE is enabled, automatic pad stripping must be disabled (bit 8 (PADSTR) of the MAC_CR—

MAC Control Register) and vice versa. These functions cannot be enabled simultaneously.

Note:

The data checksum calculation must not begin in the MAC header (first 14 bytes) or in the last 4 bytes of

the TX packet.

Note:

The TX checksum cannot be inserted in the MAC header (first 14 bytes) or in the last 4 bytes of the TX

packet.

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