LAN89218 datasheet(48/148 Pages) MICROCHIP

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LAN89218

DS60001255B-page 48

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3.12.2.2

TX Command ‘B’

3.12.3

TX DATA FORMAT

The TX data section begins at the third DWORD in the TX buffer (after TX command ‘A’ and TX command ‘B’). The

location of the first byte of valid buffer data to be transmitted is specified in the “Data Start Offset” field of the TX

command ‘A’ word. Table 3-15 shows the correlation between the setting of the LSBs in the “Data Start Offset” field

and the byte location of the first valid data byte. Additionally, transmit buffer data can be offset by up to 7 additional

DWORDS as indicated by the upper three MSBs (5:2) in the “Data Start Offset” field.

TX data is contiguous until the end of the buffer. The buffer may end on a byte boundary. Unused bytes at the end

of the packet will not be sent to the MIL for transmission.

The Buffer End Alignment field in TX command ‘A’ specifies the alignment that must be maintained for the associated

buffer. End alignment may be specified as 4-, 16-, or 32-byte. The host processor is responsible for adding the

additional data to the end of the buffer. The hardware will automatically remove this extra data.

TABLE 3-14:

TX COMMAND 'B' FORMAT

Bits

Description

31:16

Packet Tag. The host should write a unique packet identifier to this field. This identifier is added to the

corresponding TX status word and can be used by the host to correlate TX status words with their corre-

sponding packets.

Note:

The use of packet tags is not required by the hardware. This field can be used by the LAN

software driver for any application. Packet Tags is one application example.

Reserved. This bit is reserved. Always write zeros to this bit to guarantee future compatibility.

TX Checksum Enable (CK). When this bit is set in conjunction with the first segment (FS) bit in TX

Command ‘A’ and the TX checksum offload engine enable bit (TXCOE_EN) in the COE_CR—Check-

sum Offload Engine Control Register, the TX checksum offload engine (TXCOE) will calculate a L3

checksum for the associated frame.

Add CRC Disable. When set, the automatic addition of the CRC is disabled.

Disable Ethernet Frame Padding. When set, this bit prevents the automatic addition of padding to an

Ethernet frame of less than 64 bytes. The CRC field is also added despite the state of the Add CRC Dis-

able field.

Reserved. These bits are reserved. Always write zeros to this field to guarantee future compatibility.

10:0

Packet Length (bytes). This field indicates the total number of bytes in the current packet. This length

does not include the offset or padding. If the Packet Length field does not match the actual number of

bytes in the packet the Transmitter Error (TXE) flag will be set.

TABLE 3-15:

TX DATA START OFFSET

Data Start Offset [1:0]:

First TX Data Byte:

D[31:24]

D[23:16]

D[15:8]

D[7:0]

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